X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Flpd7a400-10.h;h=6145c37f78f5937a45ea57cedd3e622e5b41b51e;hb=7cdf804f34378b910b4c4edd2dac7e3ca61c0825;hp=ecf2b5ff87d6fae3aa71caeec09510594fc642e7;hpb=f39748ae8edb03017647b0d731cdd06e7bdcde13;p=oweals%2Fu-boot.git

diff --git a/include/configs/lpd7a400-10.h b/include/configs/lpd7a400-10.h
index ecf2b5ff87..6145c37f78 100644
--- a/include/configs/lpd7a400-10.h
+++ b/include/configs/lpd7a400-10.h
@@ -27,14 +27,14 @@
 
 
 #define CONFIG_ARM920T		1	/* arm920t core */
-#define CONFIG_LH7A40X		1	/* Sharp LH7A400 SoC */
-#define CONFIG_LH7A400		1
+#define CONFIG_LH7A40X		1	/* Sharp LH7A40x SoC family */
+#define CONFIG_LH7A400		1   /* Sharp LH7A400 S0C */
 
 /* The system clock PLL input frequency */
 #define CONFIG_SYS_CLK_FREQ		14745600   /* System Clock PLL Input (Hz) */
 
 /* ticks per second */
-#define CFG_HZ	(508469)
+#define CONFIG_SYS_HZ	(508469)
 
 /*-----------------------------------------------------------------------
  * Stack sizes
@@ -54,17 +54,17 @@
 #define PHYS_SDRAM_1		0xc0000000 /* SDRAM Bank #1 */
 #define PHYS_SDRAM_1_SIZE	0x02000000 /* 32 MB */
 
-#define CFG_FLASH_BASE		0x00000000 /* Flash Bank #1 */
+#define CONFIG_SYS_FLASH_BASE		0x00000000 /* Flash Bank #1 */
 
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
-#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
-#define CFG_MAX_FLASH_SECT	(64)	/* max number of sectors on one chip */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT	(64)	/* max number of sectors on one chip */
 
 /* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT	(5*CFG_HZ) /* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT	(5*CFG_HZ) /* Timeout for Flash Write */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	(5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
+#define CONFIG_SYS_FLASH_WRITE_TOUT	(5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 
 /*----------------------------------------------------------------------
  * Using SMC91C111 LAN chip