X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fkatmai.h;h=e4ccd7dafe1e736c06ed0aaad6028fa5a64942e8;hb=68b0fbf08574ac2314919ce8fad9a1965041cc44;hp=58694cca4b1cbc5e6152e267b1332740d4c9ed53;hpb=f82642e33899766892499b163e60560fbbf87773;p=oweals%2Fu-boot.git

diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index 58694cca4b..e4ccd7dafe 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -37,6 +37,7 @@
 #define CONFIG_4xx			1	/* ... PPC4xx family	*/
 #define CONFIG_440			1	/* ... PPC440 family	*/
 #define CONFIG_440SPE			1	/* Specifc SPe support	*/
+#define CONFIG_440SPE_REVA		1	/* Support old Rev A.	*/
 #define CONFIG_SYS_CLK_FREQ	33333333	/* external freq to pll	*/
 #define CONFIG_SYS_4xx_RESET_TYPE	0x2	/* use chip reset on this board	*/
 
@@ -45,7 +46,6 @@
  */
 #define CONFIG_PHYS_64BIT
 #define	CONFIG_VERY_BIG_RAM
-#define CONFIG_MAX_MEM_MAPPED	((phys_size_t)2 << 30)
 
 /*
  * Include common defines/options for all AMCC eval boards
@@ -61,7 +61,6 @@
  * actual resources get mapped (not physical addresses)
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_FLASH_BASE		0xff000000	/* start of FLASH	*/
-#define CONFIG_SYS_PERIPHERAL_BASE	0xa0000000	/* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE		0x90000000	/* internal SRAM	*/
 
 #define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped PCI memory	*/
@@ -99,13 +98,12 @@
 #define CONFIG_SYS_GBL_DATA_SIZE	128		/* num bytes initial data */
 
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
-#undef CONFIG_UART1_CONSOLE
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK
 
 /*-----------------------------------------------------------------------
@@ -123,7 +121,6 @@
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address	*/
 
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
 #define CONFIG_SYS_SPD_BUS_NUM		0	/* The I2C bus for SPD		*/
 
 #define IIC0_BOOTPROM_ADDR	0x50
@@ -135,6 +132,11 @@
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
 
+/* I2C bootstrap EEPROM */
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	0x50
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	0
+#define CONFIG_4xx_CONFIG_BLOCKSIZE		8
+
 /* I2C RTC */
 #define CONFIG_RTC_M41T11	1
 #define CONFIG_SYS_RTC_BUS_NUM		1	/* The I2C bus for RTC		*/
@@ -177,11 +179,10 @@
 #define	CONFIG_EXTRA_ENV_SETTINGS					\
 	CONFIG_AMCC_DEF_ENV						\
 	CONFIG_AMCC_DEF_ENV_POWERPC					\
-	CONFIG_AMCC_DEF_ENV_PPC_OLD					\
 	CONFIG_AMCC_DEF_ENV_NOR_UPD					\
-	"kernel_addr=fff10000\0"					\
-	"ramdisk_addr=fff20000\0"					\
-	"kozio=bootm ffc60000\0"					\
+	"kernel_addr=ff000000\0"					\
+	"fdt_addr=ff1e0000\0"						\
+	"ramdisk_addr=ff200000\0"					\
 	"pciconfighost=1\0"						\
 	"pcie_mode=RP:RP:RP\0"						\
 	""
@@ -189,7 +190,11 @@
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
+#define CONFIG_CMD_CHIP_CONFIG
 #define CONFIG_CMD_DATE
+#define CONFIG_CMD_ECCTEST
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
 #define CONFIG_CMD_PCI
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_SNTP