X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fimx31_litekit.h;h=61310089b7b0bf2af2eb4e5117435939f329d7a1;hb=14abfe361b3ed23b02f564e2f5d663e158cd5799;hp=5e97cfa72efe7edcee52cf8ce1fff21c9e92d12c;hpb=4b7a6dd89633d60dc4b58476d5ce48247f82a3ca;p=oweals%2Fu-boot.git

diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h
index 5e97cfa72e..61310089b7 100644
--- a/include/configs/imx31_litekit.h
+++ b/include/configs/imx31_litekit.h
@@ -53,21 +53,31 @@
 /*
  * Size of malloc() pool
  */
-#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128 * 1024)
-#define CFG_GBL_DATA_SIZE	128  /* size in bytes reserved for initial data */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
+#define CONFIG_SYS_GBL_DATA_SIZE	128  /* size in bytes reserved for initial data */
 
 /*
  * Hardware drivers
  */
 
-#define CONFIG_MX31_UART	1
-#define CFG_MX31_UART1		1
+#define CONFIG_MXC_UART	1
+#define CONFIG_SYS_MX31_UART1		1
+
+#define CONFIG_HARD_SPI		1
+#define CONFIG_MXC_SPI		1
+#define CONFIG_DEFAULT_SPI_BUS	1
+#define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)
+
+#define CONFIG_RTC_MC13783	1
+/* MC13783 connected to CSPI2 and SS0 */
+#define CONFIG_MC13783_SPI_BUS	1
+#define CONFIG_MC13783_SPI_CS	0
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX	1
 #define CONFIG_BAUDRATE		115200
-#define CFG_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
+#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
 
 /***********************************************************
  * Command definition
@@ -77,6 +87,8 @@
 
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_DATE
 
 #define CONFIG_BOOTDELAY	3
 
@@ -92,29 +104,28 @@
 	"prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0"
 
 
-#define CONFIG_DRIVER_SMC911X		1
-#define CONFIG_DRIVER_SMC911X_BASE	(CS4_BASE + 0x00020000)
-#define CONFIG_DRIVER_SMC911X_32_BIT	1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC911X		1
+#define CONFIG_SMC911X_BASE	(CS4_BASE + 0x00020000)
+#define CONFIG_SMC911X_32_BIT	1
 
 /*
  * Miscellaneous configurable options
  */
-#define CFG_LONGHELP		/* undef to save memory */
-#define CFG_PROMPT		"uboot> "
-#define CFG_CBSIZE		256  /* Console I/O Buffer Size */
+#define CONFIG_SYS_LONGHELP		/* undef to save memory */
+#define CONFIG_SYS_PROMPT		"uboot> "
+#define CONFIG_SYS_CBSIZE		256  /* Console I/O Buffer Size */
 /* Print Buffer Size */
-#define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
-#define CFG_MAXARGS		16          /* max number of command args */
-#define CFG_BARGSIZE		CFG_CBSIZE  /* Boot Argument Buffer Size */
-
-#define CFG_MEMTEST_START	0  /* memtest works on */
-#define CFG_MEMTEST_END		0x10000
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS		16          /* max number of command args */
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
 
-#undef	CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */
+#define CONFIG_SYS_MEMTEST_START	0  /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END		0x10000
 
-#define CFG_LOAD_ADDR		0 /* default load address */
+#define CONFIG_SYS_LOAD_ADDR		0 /* default load address */
 
-#define CFG_HZ			32000
+#define CONFIG_SYS_HZ			1000
 
 #define CONFIG_CMDLINE_EDITING	1
 
@@ -135,32 +146,32 @@
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
-#define CFG_FLASH_BASE		CS0_BASE
-#define CFG_MAX_FLASH_BANKS	1           /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT	128	     /* max number of sectors on one chip */
-#define CFG_MONITOR_BASE	CFG_FLASH_BASE /* Monitor at beginning of flash */
+#define CONFIG_SYS_FLASH_BASE		CS0_BASE
+#define CONFIG_SYS_MAX_FLASH_BANKS	1           /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT	128	     /* max number of sectors on one chip */
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
 
-#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x001f0000)
-#define	CFG_ENV_IS_IN_FLASH	1
-#define CFG_ENV_SECT_SIZE	(64 * 1024)
-#define CFG_ENV_SIZE		(64 * 1024)
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x001f0000)
+#define	CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_SECT_SIZE	(64 * 1024)
+#define CONFIG_ENV_SIZE		(64 * 1024)
 
 /*-----------------------------------------------------------------------
  * CFI FLASH driver setup
  */
-#define CFG_FLASH_CFI		1	/* Flash memory is CFI compliant */
-#define CFG_FLASH_CFI_DRIVER	1	/* Use drivers/cfi_flash.c */
-#define CFG_FLASH_USE_BUFFER_WRITE 1	/* Use buffered writes (~10x faster) */
-#define CFG_FLASH_PROTECTION	1	/* Use hardware sector protection */
+#define CONFIG_SYS_FLASH_CFI		1	/* Flash memory is CFI compliant */
+#define CONFIG_FLASH_CFI_DRIVER	1	/* Use drivers/cfi_flash.c */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1	/* Use buffered writes (~10x faster) */
+#define CONFIG_SYS_FLASH_PROTECTION	1	/* Use hardware sector protection */
 
 /* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT	(100*CFG_HZ) /* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT	(100*CFG_HZ) /* Timeout for Flash Write */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	(100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
+#define CONFIG_SYS_FLASH_WRITE_TOUT	(100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 
 /*
  * JFFS2 partitions
  */
-#undef CONFIG_JFFS2_CMDLINE
+#undef CONFIG_CMD_MTDPARTS
 #define CONFIG_JFFS2_DEV	"nor0"
 
 #endif /* __CONFIG_H */