X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fdlvision.h;h=1e86c556abe42b21c45867e533e07cca33379138;hb=e97f9d817e600cd6f43d1d0da76f5787e33a5c56;hp=4533799971c4b989f30e9fe96bfec951f10aa959;hpb=4e37963af708198f3a5c187edaaf584115ac1df6;p=oweals%2Fu-boot.git diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index 4533799971..1e86c556ab 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -2,37 +2,22 @@ * (C) Copyright 2009 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H #define CONFIG_405EP 1 /* this is a PPC405 CPU */ -#define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_DLVISION 1 /* on a Neo board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvision -#define CONFIG_IDENT_STRING " dlvision 0.01" +#define CONFIG_IDENT_STRING " dlvision 0.02" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ @@ -97,7 +82,7 @@ * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, * set Linux BASE_BAUD to 403200. */ -#undef CONFIG_SERIAL_SOFTWARE_FIFO +#define CONFIG_CONS_INDEX 1 /* Use UART0 */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */ #undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ #define CONFIG_SYS_BASE_BAUD 691200 @@ -105,7 +90,7 @@ /* * I2C stuff */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address*/ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 /* * FLASH organization @@ -123,7 +108,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ @@ -189,11 +173,10 @@ #define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000 #define CONFIG_SYS_OCM_DATA_SIZE 0x1000 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */ -#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area */ +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size/bytes res'd for init data*/ #define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*