X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fcsb472.h;h=b06c0a269da282a04244f8565258bcc1ac94c00a;hb=9939ffd5fbf1f5aff4d8172531d4fc33797c62c8;hp=a7120aa57f9d07d28ea4eb1d22ee18638d9d0416;hpb=6bf6f114dcdd97ec3f80c2761ed40e31229d6b78;p=oweals%2Fu-boot.git

diff --git a/include/configs/csb472.h b/include/configs/csb472.h
index a7120aa57f..b06c0a269d 100644
--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@@ -33,7 +33,7 @@
  * (easy to change)
  */
 
-#define CONFIG_405GP		1	/* This is a PPC405GP CPU     	*/
+#define CONFIG_405GP		1	/* This is a PPC405GP CPU	*/
 #define CONFIG_4xx		1	/* ...member of PPC4xx family   */
 #define CONFIG_CSB472		1	/* on a Cogent CSB472 board     */
 #define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f()    */
@@ -181,7 +181,7 @@
  */
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
-#define CONFIG_PHY_CMD_DELAY	40	/* PHY COMMAND delay 		*/
+#define CONFIG_PHY_CMD_DELAY	40	/* PHY COMMAND delay		*/
 					/* 32usec min. for LXT971A	*/
 #define CONFIG_PHY_RESET_DELAY	300	/* PHY RESET recovery delay	*/
 
@@ -288,14 +288,6 @@
 #define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
 
-/*
- * Cache configuration
- *
- */
-#define CFG_DCACHE_SIZE		16384	/* For AMCC 405 CPUs, older 405 ppc's */
-					/* have only 8kB, 16kB is save here  */
-#define CFG_CACHELINE_SIZE	32
-
 /*
  * Miscellaneous board specific definitions
  *