X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fcobra5272.h;h=11dd4d712be372533e64fb2f008e7d3063b97f0e;hb=e186851ae4f0a4c8b75108930b61a5f74baf6ed4;hp=330e3ac667637ecf68aeb6b310a45d3a39a69482;hpb=dd9f054ede433de73b137987fb3dc066e8d24ebb;p=oweals%2Fu-boot.git diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 330e3ac667..11dd4d712b 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -3,23 +3,7 @@ * * (C) Copyright 2003 Josef Baumgartner * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* --- @@ -40,24 +24,12 @@ #ifndef _CONFIG_COBRA5272_H #define _CONFIG_COBRA5272_H -/* --- - * Define processor - * possible values for Sentec board: only Coldfire M5272 processor supported - * (please do not change) - * --- - */ - -#define CONFIG_MCF52x2 /* define processor family */ -#define CONFIG_M5272 /* define processor type */ - /* --- * Defines processor clock - important for correct timings concerning serial * interface etc. - * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms * --- */ -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CLK 66000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ @@ -81,7 +53,6 @@ #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) #define CONFIG_BAUDRATE 19200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } /* --- * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change @@ -107,7 +78,7 @@ * * Setting #if 0: u-boot will start from flash and relocate itself to RAM * - * Please do not forget to modify the setting of TEXT_BASE + * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) * * --- @@ -133,6 +104,9 @@ #define CONFIG_ENV_IS_IN_FLASH 1 #endif +#define LDS_BOARD_TEXT \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text); /* * BOOTP options @@ -155,7 +129,6 @@ #undef CONFIG_CMD_MII #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY @@ -204,7 +177,6 @@ considered during boot */ /* User network settings */ -#define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */ #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */ #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */ @@ -276,9 +248,8 @@ from which user programs will be started */ * Definitions for initial stack pointer and data area (in internal SRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- @@ -332,9 +303,9 @@ from which user programs will be started */ #define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 8) + CONFIG_SYS_INIT_RAM_SIZE - 8) #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 4) + CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \