X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fcgtqmx6eval.h;h=d24d9a45f130a6e55cf304b12e204c6f5da453e1;hb=477b16a7982eee080a142f08f2cf2d05ade99c31;hp=bccfedf3dfd0ea62fd3ff3ab10a7b522f622c2ef;hpb=4ef6ecec9cdf1ce4c7b4f2a6b0f903583bfa24a2;p=oweals%2Fu-boot.git diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index bccfedf3df..d24d9a45f1 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -26,8 +26,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT #define CONFIG_MISC_INIT_R #define CONFIG_MXC_UART @@ -45,9 +43,6 @@ #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) -/* Miscellaneous commands */ -#define CONFIG_CMD_BMODE - /* Thermal support */ #define CONFIG_IMX_THERMAL @@ -66,26 +61,15 @@ #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 /* USB Configs */ -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MX6 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_ASIX #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ -#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP #define CONFIG_USBD_HS #define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_USB_FUNCTION_FASTBOOT -#define CONFIG_CMD_FASTBOOT -#define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 - /* Framebuffer */ #define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 @@ -94,16 +78,9 @@ #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO -#ifdef CONFIG_MX6DL -#define CONFIG_IPUV3_CLK 198000000 -#else -#define CONFIG_IPUV3_CLK 264000000 -#endif #define CONFIG_IMX_HDMI /* SATA */ -#define CONFIG_CMD_SATA -#define CONFIG_DWC_AHSATA #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR @@ -117,7 +94,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS /* Command definition */ @@ -253,7 +229,6 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_ENV_IS_IN_SPI_FLASH #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) #define CONFIG_ENV_OFFSET (768 * 1024) #define CONFIG_ENV_SECT_SIZE (64 * 1024)