X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fblackstamp.h;h=c0197ca0e6295ffc1d1888b3d797eb8727968405;hb=6f43ba70d15e15a08c25b3d956c70addb6740737;hp=f61e5b7f9cea5b3beb88f1dc34ac271d73ed8720;hpb=3088189a15d219c48fd7e71623ca4daa08b80b59;p=oweals%2Fu-boot.git

diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h
index f61e5b7f9c..c0197ca0e6 100644
--- a/include/configs/blackstamp.h
+++ b/include/configs/blackstamp.h
@@ -8,7 +8,7 @@
 #ifndef __CONFIG_BLACKSTAMP_H__
 #define __CONFIG_BLACKSTAMP_H__
 
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
 
 /*
  * Debugging: Set these options if you're having problems
@@ -30,7 +30,7 @@
 /*
  * Board settings
  */
-#define CONFIG_DRIVER_SMC91111	1
+#define CONFIG_SMC91111	1
 #define CONFIG_SMC91111_BASE	0x20300300
 
 /* FLASH/ETHERNET uses the same address range
@@ -40,7 +40,6 @@
 #define SHARED_RESOURCES	1
 
 /* Is I2C bit-banged? */
-#undef CONFIG_SOFT_I2
 
 /*
  * Clock Settings
@@ -69,24 +68,20 @@
  * Network settings
  */
 
-#ifdef CONFIG_DRIVER_SMC91111
+#ifdef CONFIG_SMC91111
 #define CONFIG_IPADDR		192.168.0.15
 #define CONFIG_NETMASK		255.255.255.0
 #define CONFIG_GATEWAYIP	192.168.0.1
 #define CONFIG_SERVERIP		192.168.0.2
 #define CONFIG_HOSTNAME		blackstamp
-#define CONFIG_ROOTPATH		/checkout/uClinux-dist/romfs
+#define CONFIG_ROOTPATH		"/checkout/uClinux-dist/romfs"
 #define CONFIG_SYS_AUTOLOAD		"no"
-
-/* To remove hardcoding and enable MAC storage in EEPROM  */
-/* #define CONFIG_ETHADDR		02:80:ad:20:31:b8 */
 #endif
 
 #define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_OFFSET	0x4000
+#define CONFIG_ENV_OFFSET	0x40000
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x40000
-#define ENV_IS_EMBEDDED_CUSTOM
 
 /*
  * SDRAM settings & memory map
@@ -107,16 +102,13 @@
 #define CONFIG_AUTO_COMPLETE	1
 #define CONFIG_ENV_OVERWRITE	1
 
-#include <config_cmd_default.h>
-
-#ifdef CONFIG_DRIVER_SMC91111
+#ifdef CONFIG_SMC91111
 # define CONFIG_CMD_DHCP
 # define CONFIG_CMD_PING
 #else
-# undef CONFIG_CMD_NET
 #endif
 
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
 # define CONFIG_CMD_I2C
 #endif
 
@@ -131,12 +123,12 @@
 #define CONFIG_BOOTCOMMAND   "run ramboot"
 #define CONFIG_BOOTARGS \
 	"root=/dev/mtdblock0 rw " \
-	"clkin_hz=" MK_STR(CONFIG_CLKIN_HZ) " " \
+	"clkin_hz=" __stringify(CONFIG_CLKIN_HZ) " " \
 	"earlyprintk=" \
 		"serial," \
-		"uart" MK_STR(CONFIG_UART_CONSOLE) "," \
-		MK_STR(CONFIG_BAUDRATE) " " \
-	"console=ttyBF0," MK_STR(CONFIG_BAUDRATE)
+		"uart" __stringify(CONFIG_UART_CONSOLE) "," \
+		__stringify(CONFIG_BAUDRATE) " " \
+	"console=ttyBF0," __stringify(CONFIG_BAUDRATE)
 
 #if defined(CONFIG_CMD_NET)
 # if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
@@ -150,7 +142,7 @@
 		"eeprom write $(loadaddr) 0x0 $(filesize)"
 #  else
 #   define UBOOT_ENV_UPDATE \
-		"sf probe " MK_STR(BFIN_BOOT_SPI_SSEL) ";" \
+		"sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \
 		"sf erase 0 0x40000;" \
 		"sf write $(loadaddr) 0 $(filesize)"
 #  endif
@@ -197,6 +189,7 @@
 #define CONFIG_BAUDRATE		57600
 #define CONFIG_LOADS_ECHO	1
 #define CONFIG_UART_CONSOLE	0
+#define CONFIG_BFIN_SERIAL
 
 /*
  * I2C settings
@@ -205,35 +198,11 @@
  * Note these pins are arbitrarily chosen because we aren't using
  * them yet. You can (and probably should) change these values!
  */
-#ifdef CONFIG_SOFT_I2C
-
-#define PF_SCL			PF9
-#define PF_SDA			PF8
-
-#define I2C_INIT       do { *pFIO_DIR |= PF_SCL; SSYNC(); } while (0)
-#define I2C_ACTIVE     do { *pFIO_DIR |= PF_SDA; *pFIO_INEN &= ~PF_SDA; SSYNC(); } while (0)
-#define I2C_TRISTATE   do { *pFIO_DIR &= ~PF_SDA; *pFIO_INEN |= PF_SDA; SSYNC(); } while (0)
-#define I2C_READ       ((*pFIO_FLAG_D & PF_SDA) != 0)
-#define I2C_SDA(bit) \
-	do { \
-		if (bit) \
-			*pFIO_FLAG_S = PF_SDA; \
-		else \
-			*pFIO_FLAG_C = PF_SDA; \
-		SSYNC(); \
-	} while (0)
-#define I2C_SCL(bit) \
-	do { \
-		if (bit) \
-			*pFIO_FLAG_S = PF_SCL; \
-		else \
-			*pFIO_FLAG_C = PF_SCL; \
-		SSYNC(); \
-	} while (0)
-#define I2C_DELAY		udelay(5)	/* 1/4 I2C clock duration */
-
-#define CONFIG_SYS_I2C_SPEED		50000
-#define CONFIG_SYS_I2C_SLAVE		0xFE
+#ifdef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF9
+#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF8
+#define CONFIG_SYS_I2C_SOFT_SPEED	50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE	0xFE
 #endif
 
 /*
@@ -245,10 +214,9 @@
  * Serial Flash Infomation
  */
 #define CONFIG_BFIN_SPI
-/* For the M25P64 SCK Should be Kept < 20Mhz */
-#define CONFIG_ENV_SPI_MAX_HZ	20000000
-#define CONFIG_SF_DEFAULT_HZ	20000000
-#define CONFIG_SPI_FLASH
+/* For the M25P64 SCK Should be Kept < 15Mhz */
+#define CONFIG_ENV_SPI_MAX_HZ	15000000
+#define CONFIG_SF_DEFAULT_SPEED	15000000
 #define CONFIG_SPI_FLASH_STMICRO
 
 /*
@@ -266,10 +234,6 @@
  * hardware don't support Parallel Flash at all.
  */
 #define CONFIG_SYS_NO_FLASH
-#undef CONFIG_CMD_IMLS
 #undef CONFIG_CMD_JFFS2
-#undef CONFIG_CMD_FLASH
-
-#include <asm/blackfin-config-post.h>
 
 #endif