X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fbf533-stamp.h;h=6e138b8620092de6f2d3f777b5076f1f0ca4df69;hb=35dd025c70fcc4389317db2f2a9d14795172137d;hp=66a0af683db6bac071299192ab8dc437c6c1e308;hpb=9171fc81722c20fdb5a829a58b17c9eaadd5fb44;p=oweals%2Fu-boot.git

diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h
index 66a0af683d..6e138b8620 100644
--- a/include/configs/bf533-stamp.h
+++ b/include/configs/bf533-stamp.h
@@ -25,7 +25,7 @@
 #define CONFIG_SMC91111_BASE	0x20300300
 
 /* FLASH/ETHERNET uses the same address range */
-#define SHARED_RESOURCES 	1
+#define SHARED_RESOURCES	1
 
 /* Is I2C bit-banged? */
 #define CONFIG_SOFT_I2C		1
@@ -94,7 +94,7 @@
  */
 
 #define CFG_FLASH_CFI		/* The flash is CFI compatible  */
-#define CFG_FLASH_CFI_DRIVER	/* Use common CFI driver	*/
+#define CONFIG_FLASH_CFI_DRIVER	/* Use common CFI driver	*/
 #define	CFG_FLASH_CFI_AMD_RESET
 
 #define CFG_FLASH_BASE		0x20000000
@@ -102,17 +102,17 @@
 #define CFG_MAX_FLASH_SECT	67	/* max number of sectors on one chip */
 
 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
-#define CFG_ENV_IS_IN_EEPROM	1
-#define CFG_ENV_OFFSET		0x4000
-#define CFG_ENV_HEADER		(CFG_ENV_OFFSET + 0x12A)	/* 0x12A is the length of LDR file header */
+#define CONFIG_ENV_IS_IN_EEPROM	1
+#define CONFIG_ENV_OFFSET		0x4000
+#define CONFIG_ENV_HEADER		(CONFIG_ENV_OFFSET + 0x12A)	/* 0x12A is the length of LDR file header */
 #else
-#define CFG_ENV_IS_IN_FLASH	1
-#define CFG_ENV_ADDR		0x20004000
-#define	CFG_ENV_OFFSET		(CFG_ENV_ADDR - CFG_FLASH_BASE)
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_ADDR		0x20004000
+#define	CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CFG_FLASH_BASE)
 #endif
 
-#define	CFG_ENV_SIZE		0x2000
-#define CFG_ENV_SECT_SIZE 	0x2000	/* Total Size of Environment Sector */
+#define	CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_SECT_SIZE	0x2000	/* Total Size of Environment Sector */
 #define	ENV_IS_EMBEDDED
 
 #define CFG_FLASH_ERASE_TOUT	30000	/* Timeout for Chip Erase (in ms) */
@@ -123,7 +123,7 @@
 #define CFG_JFFS2_FIRST_BANK 0
 #define CFG_JFFS2_NUM_BANKS  1
 /* 512k reserved for u-boot */
-#define CFG_JFFS2_FIRST_SECTOR 	11
+#define CFG_JFFS2_FIRST_SECTOR	11
 
 /*
  * following timeouts shall be used once the
@@ -148,7 +148,7 @@
 #define CFG_MEMTEST_END		(CFG_MAX_RAM_SIZE - 0x80000 - 1)
 #define CONFIG_LOADADDR		0x01000000
 
-#define CFG_LOAD_ADDR 		CONFIG_LOADADDR
+#define CFG_LOAD_ADDR		CONFIG_LOADADDR
 #define	CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
 #define CFG_MALLOC_LEN		(128 << 10)     /* Reserve 128 kB for malloc()	*/
 #define CFG_GBL_DATA_SIZE	0x4000		/* Reserve 16k for Global Data  */