X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fatstk1006.h;h=25090a68fa719fe34b9e7d018d89798f443c03b6;hb=e1cc4d31f889428a4ca73120951389c756404184;hp=280ecbccc88fcec57401d4083a5a76d36cbebb34;hpb=1cc619be8b73abbee2fd6faf2cd4ade27b516531;p=oweals%2Fu-boot.git diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h index 280ecbccc8..25090a68fa 100644 --- a/include/configs/atstk1006.h +++ b/include/configs/atstk1006.h @@ -3,40 +3,18 @@ * * Configuration settings for the ATSTK1002 CPU daughterboard * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H #include -#define CONFIG_AVR32 #define CONFIG_AT32AP #define CONFIG_AT32AP7000 #define CONFIG_ATSTK1006 #define CONFIG_ATSTK1000 -/* - * Timer clock frequency. We're using the CPU-internal COUNT register - * for this, so this is equivalent to the CPU core clock frequency - */ -#define CONFIG_SYS_HZ 1000 /* * Set up the PLL to run at 140 MHz, the CPU to run at the PLL @@ -181,7 +159,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) #define CONFIG_SYS_MALLOC_LEN (256*1024) -#define CONFIG_SYS_DMA_ALLOC_LEN (16384) /* Allow 4MB for the kernel run-time image */ #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)