X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FVCMA9.h;h=aeb649e190f1313252f201027b0a23fac3b6f19e;hb=df4a0796e86662536df2387ddcf969c2a704bcc2;hp=df6894f3240a69451890281289d6e3e9c3e5b1b7;hpb=b23b547597ff2375ad13a9ab04e5257a3ad76c99;p=oweals%2Fu-boot.git

diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index df6894f324..aeb649e190 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -44,7 +44,7 @@
 #define USE_920T_MMU		1
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
-#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs    	*/
+#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs	*/
 #define CONFIG_SETUP_MEMORY_TAGS 1
 #define CONFIG_INITRD_TAG	 1
 
@@ -84,14 +84,14 @@
  * address 0x50 with 16bit addressing
  ***********************************************************/
 #define CONFIG_HARD_I2C			/* I2C with hardware support */
-#define CFG_I2C_SPEED 		100000	/* I2C speed */
-#define CFG_I2C_SLAVE 		0x7F	/* I2C slave addr */
+#define CFG_I2C_SPEED		100000	/* I2C speed */
+#define CFG_I2C_SLAVE		0x7F	/* I2C slave addr */
 
 #define CFG_I2C_EEPROM_ADDR	0x50
 #define CFG_I2C_EEPROM_ADDR_LEN	2
-#define CFG_ENV_IS_IN_EEPROM	1	/* use EEPROM for environment vars */
-#define CFG_ENV_OFFSET		0x000	/* environment starts at offset 0 */
-#define CFG_ENV_SIZE		0x800	/* 2KB should be more than enough */
+#define CONFIG_ENV_IS_IN_EEPROM	1	/* use EEPROM for environment vars */
+#define CONFIG_ENV_OFFSET		0x000	/* environment starts at offset 0 */
+#define CONFIG_ENV_SIZE		0x800	/* 2KB should be more than enough */
 
 #undef CFG_I2C_EEPROM_ADDR_OVERFLOW
 #define CFG_EEPROM_PAGE_WRITE_BITS 6	/* 64 bytes page write mode on 24C256 */
@@ -100,7 +100,7 @@
 /*
  * Size of malloc() pool
  */
-/*#define CONFIG_MALLOC_SIZE	(CFG_ENV_SIZE + 128*1024)*/
+/*#define CONFIG_MALLOC_SIZE	(CONFIG_ENV_SIZE + 128*1024)*/
 #define CFG_GBL_DATA_SIZE	128		/* size in bytes reserved for initial data */
 
 #define CFG_MONITOR_LEN		(256 * 1024)
@@ -111,7 +111,7 @@
  */
 #define CONFIG_DRIVER_CS8900	1		/* we have a CS8900 on-board */
 #define CS8900_BASE		0x20000300
-#define CS8900_BUS16		1 		/* the Linux driver does accesses as shorts */
+#define CS8900_BUS16		1		/* the Linux driver does accesses as shorts */
 
 #define CONFIG_DRIVER_S3C24X0_I2C	1	/* we use the buildin I2C controller */
 
@@ -145,7 +145,7 @@
 #define CONFIG_BOOTDELAY	5
 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
 /* #define CONFIG_BOOT_RETRY_TIME	-10	/XXX* feature is available but not enabled */
-#define CONFIG_ZERO_BOOTDELAY_CHECK  	/* check console even if bootdelay = 0 */
+#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check console even if bootdelay = 0 */
 
 #define CONFIG_NETMASK          255.255.255.0
 #define CONFIG_IPADDR		10.0.0.110
@@ -226,12 +226,12 @@
 #ifdef CONFIG_AMD_LV800
 #define PHYS_FLASH_SIZE		0x00100000 /* 1MB */
 #define CFG_MAX_FLASH_SECT	(19)	/* max number of sectors on one chip */
-#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
+#define CONFIG_ENV_ADDR		(CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
 #endif
 #ifdef CONFIG_AMD_LV400
 #define PHYS_FLASH_SIZE		0x00080000 /* 512KB */
 #define CFG_MAX_FLASH_SECT	(11)	/* max number of sectors on one chip */
-#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x070000) /* addr of environment */
+#define CONFIG_ENV_ADDR		(CFG_FLASH_BASE + 0x070000) /* addr of environment */
 #endif
 
 /* timeout values are in ticks */
@@ -239,8 +239,8 @@
 #define CFG_FLASH_WRITE_TOUT	(5*CFG_HZ) /* Timeout for Flash Write */
 
 #if 0
-#define	CFG_ENV_IS_IN_FLASH	1
-#define CFG_ENV_SIZE		0x10000	/* Total Size of Environment Sector */
+#define	CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_SIZE		0x10000	/* Total Size of Environment Sector */
 #endif
 
 
@@ -254,7 +254,7 @@
  */
 #if defined(CONFIG_CMD_NAND)
 
-#define CFG_NAND_LEGACY
+#define CONFIG_NAND_LEGACY
 #define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices		*/
 #define SECTORSIZE 512
 
@@ -262,7 +262,7 @@
 #define ADDR_PAGE 2
 #define ADDR_COLUMN_PAGE 3
 
-#define NAND_ChipID_UNKNOWN 	0x00
+#define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS 1
 #define NAND_MAX_CHIPS 1