X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FTQM85xx.h;h=2ef24cd7e506603e5b0fd825c1d5fe5d135c0ee6;hb=2c5bd16af132bb6e9158c43fc6206fa0f1f501c1;hp=72db26c7b13c3dce27901bc99f6c206869af2412;hpb=68d7d65100e84df00bca971c114092731b441090;p=oweals%2Fu-boot.git

diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index 72db26c7b1..2ef24cd7e5 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -371,35 +371,17 @@
 #define	CONFIG_SYS_NAND_CS_DIST	0x200
 
 #define CONFIG_SYS_NAND_SIZE		0x8000
-#define CONFIG_SYS_NAND0_BASE		(CONFIG_SYS_CCSRBAR + 0x03010000)
-#define CONFIG_SYS_NAND1_BASE		(CONFIG_SYS_NAND0_BASE + CONFIG_SYS_NAND_CS_DIST)
-#define CONFIG_SYS_NAND2_BASE		(CONFIG_SYS_NAND1_BASE + CONFIG_SYS_NAND_CS_DIST)
-#define CONFIG_SYS_NAND3_BASE		(CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST)
-
-#define CONFIG_SYS_MAX_NAND_DEVICE     2	/* Max number of NAND devices	*/
-
-#if (CONFIG_SYS_MAX_NAND_DEVICE == 1)
-#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE }
-#elif (CONFIG_SYS_MAX_NAND_DEVICE == 2)
-#define	CONFIG_SYS_NAND_QUIET_TEST	1
-#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE, \
-			     CONFIG_SYS_NAND1_BASE, \
-}
-#elif (CONFIG_SYS_MAX_NAND_DEVICE == 4)
-#define	CONFIG_SYS_NAND_QUIET_TEST	1
-#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE, \
-			     CONFIG_SYS_NAND1_BASE, \
-			     CONFIG_SYS_NAND2_BASE, \
-			     CONFIG_SYS_NAND3_BASE, \
-}
-#endif
+#define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_CCSRBAR + 0x03010000)
+
+#define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND devices	*/
+#define CONFIG_SYS_NAND_MAX_CHIPS	2	/* Number of chips per device	*/
 
 /* CS3 for NAND Flash */
-#define CONFIG_SYS_BR3_PRELIM		((CONFIG_SYS_NAND0_BASE & BR_BA) | BR_PS_8 | \
-				 BR_MS_UPMB | BR_V)
+#define CONFIG_SYS_BR3_PRELIM		((CONFIG_SYS_NAND_BASE & BR_BA) | \
+					 BR_PS_8 | BR_MS_UPMB | BR_V)
 #define CONFIG_SYS_OR3_PRELIM		(P2SZ_TO_AM(CONFIG_SYS_NAND_SIZE) | OR_UPM_BI)
 
-#define NAND_BIG_DELAY_US       25	/* max tR for Samsung devices	*/
+#define NAND_BIG_DELAY_US		25	/* max tR for Samsung devices	*/
 
 #endif /* CONFIG_NAND */