X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FT104xRDB.h;h=6cc95ef2d102b2c89da104be94bc62a6eae0bd18;hb=e186851ae4f0a4c8b75108930b61a5f74baf6ed4;hp=57cdf7213c4c6b3fa4233f36e02eb9ac50ebef23;hpb=bd5053ffa5b8162257537bdb79ba829372423096;p=oweals%2Fu-boot.git

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 57cdf7213c..6cc95ef2d1 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -220,7 +220,6 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_SYS_FSL_DDR3
 
 #define CONFIG_SYS_SPD_BUS_NUM	0
@@ -342,7 +341,6 @@
 #define CONFIG_SYS_NAND_DDR_LAW		11
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
 #define CONFIG_CMD_NAND
 
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(512 * 1024)
@@ -726,6 +724,14 @@
 #define CONFIG_SYS_RGMII1_PHY_ADDR		0x01
 #define CONFIG_SYS_RGMII2_PHY_ADDR		0x02
 
+/* Enable VSC9953 L2 Switch driver on T1040 SoC */
+#ifdef CONFIG_T1040RDB
+#define CONFIG_VSC9953
+#define CONFIG_VSC9953_CMD
+#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR	0x04
+#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR	0x08
+#endif
+
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC4"
 #define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */