X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FT102xQDS.h;h=303c73bf1b2fee7dd65ebd565f7664242290ec5c;hb=c27269953b94d19b3fc7a21a1c3e19985507b94d;hp=37fee3d578022e8205ff580667e6a8af9465c7ba;hpb=d3662dff78e94d8d836fc61b84ce46fef91b9aa7;p=oweals%2Fu-boot.git diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 37fee3d578..303c73bf1b 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -12,7 +12,6 @@ #define __T1024QDS_H /* High Level Configuration Options */ -#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_BOOKE #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ @@ -29,12 +28,10 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE #define CONFIG_DEEP_SLEEP #if defined(CONFIG_DEEP_SLEEP) -#define CONFIG_SILENT_CONSOLE #define CONFIG_BOARD_EARLY_INIT_F #endif @@ -42,16 +39,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_rcw.cfg -#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT -#define CONFIG_SPL_ENV_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 @@ -66,19 +55,17 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_nand_rcw.cfg #define CONFIG_SPL_NAND_BOOT #endif #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) @@ -88,12 +75,12 @@ #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_spi_rcw.cfg #define CONFIG_SPL_SPI_BOOT #endif #ifdef CONFIG_SDCARD #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_MMC_MINIMAL #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000) @@ -103,6 +90,7 @@ #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_sd_rcw.cfg #define CONFIG_SPL_MMC_BOOT #endif @@ -505,19 +493,14 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) -#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ /* Video */ -#ifdef CONFIG_PPC_T1024 /* no DIU on T1023 */ +#ifdef CONFIG_ARCH_T1024 /* no DIU on T1023 */ #define CONFIG_FSL_DIU_FB #ifdef CONFIG_FSL_DIU_FB #define CONFIG_FSL_DIU_CH7301 #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000) -#define CONFIG_VIDEO #define CONFIG_CMD_BMP -#define CONFIG_CFB_CONSOLE -#define CONFIG_VIDEO_SW_CURSOR -#define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS @@ -574,7 +557,6 @@ unsigned long get_board_ddr_clk(void); * General PCIe * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -646,7 +628,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ @@ -681,7 +662,6 @@ unsigned long get_board_ddr_clk(void); /* * SDHC */ -#define CONFIG_MMC #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR