X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FSandpoint8240.h;h=9898a8b8b627832281f3c0750766ffd8e8c8abaa;hb=df4a0796e86662536df2387ddcf969c2a704bcc2;hp=f4339ecd9c8209fb0ce3a4299bc8eedf15f6d94e;hpb=fe126d8b34d2e7c3c2dc1d4e61086018e016768c;p=oweals%2Fu-boot.git

diff --git a/include/configs/Sandpoint8240.h b/include/configs/Sandpoint8240.h
index f4339ecd9c..9898a8b8b6 100644
--- a/include/configs/Sandpoint8240.h
+++ b/include/configs/Sandpoint8240.h
@@ -80,18 +80,30 @@
 	""
 #define CONFIG_BOOTCOMMAND	"run flash_self"
 
-#define CONFIG_COMMANDS	       (CONFIG_CMD_DFL	| \
-				CFG_CMD_DHCP	| \
-				CFG_CMD_ELF	| \
-				CFG_CMD_I2C	| \
-				CFG_CMD_SDRAM	| \
-				CFG_CMD_EEPROM	| \
-				CFG_CMD_NFS	| \
-				CFG_CMD_PCI	| \
-				CFG_CMD_SNTP	)
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any)	*/
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SNTP
+
 
 #define CONFIG_DRAM_SPEED	100		/* MHz				*/
 
@@ -164,9 +176,9 @@
 #else
 #define CFG_FLASH_SIZE		(1024 * 1024)	/* Unity has onboard 1MByte flash */
 #endif
-#define CFG_ENV_IS_IN_FLASH	1
-#define CFG_ENV_OFFSET		0x00004000	/* Offset of Environment Sector */
-#define CFG_ENV_SIZE		0x00002000	/* Total Size of Environment Sector */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_OFFSET		0x00004000	/* Offset of Environment Sector */
+#define CONFIG_ENV_SIZE		0x00002000	/* Total Size of Environment Sector */
 
 #define CFG_MALLOC_LEN		(512 << 10)	/* Reserve 512 kB for malloc()	*/
 
@@ -223,7 +235,7 @@
  */
 
 
-#define CFG_WINBOND_83C553	1	/*has a winbond bridge			*/
+#define CONFIG_WINBOND_83C553	1	/*has a winbond bridge			*/
 #define CFG_USE_WINBOND_IDE	0	/*use winbond 83c553 internal IDE ctrlr */
 #define CFG_WINBOND_ISA_CFG_ADDR    0x80005800	/*pci-isa bridge config addr	*/
 #define CFG_WINBOND_IDE_CFG_ADDR    0x80005900	/*ide config addr		*/
@@ -234,7 +246,7 @@
 /*
  * NS87308 Configuration
  */
-#define CFG_NS87308			/* Nat Semi super-io controller on ISA bus */
+#define CONFIG_NS87308			/* Nat Semi super-io controller on ISA bus */
 
 #define CFG_NS87308_BADDR_10	1
 
@@ -384,7 +396,7 @@
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE	32	/* For MPC8240 CPU			*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #  define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
 #endif