X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FPLU405.h;h=928ed8e15b27b5b3ec2dd2483778e09d972c579d;hb=abaa5ba4e3b52f82b8158044cba6cf7986309d43;hp=85e4611aa1cc10b06aee615d8ee5b4978ecc7649;hpb=57bf140ac66f95c9c36c494e4d027551b5477b01;p=oweals%2Fu-boot.git

diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 85e4611aa1..928ed8e15b 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -135,9 +135,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#undef	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
@@ -181,8 +186,6 @@
 #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1       /* ".i" read skips bad blocks   */
 #define CONFIG_SYS_NAND_QUIET          1
 
-#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
-
 /*
  * PCI stuff
  */
@@ -280,6 +283,7 @@
  * I2C EEPROM (24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
@@ -298,7 +302,8 @@
 /*
  * External Bus Controller (EBC) Setup
  */
-#define CAN_BA		0xF0000000	    /* CAN Base Address	        */
+#define CAN0_BA		0xF0000000	    /* CAN0 Base Address	*/
+#define CAN1_BA		0xF0000100	    /* CAN1 Base Address	*/
 #define DUART0_BA	0xF0000400	    /* DUART Base Address       */
 #define DUART1_BA	0xF0000408	    /* DUART Base Address       */
 #define RTC_BA		0xF0000500	    /* RTC Base Address         */
@@ -379,12 +384,12 @@
  * GPIO0[28-29] - UART1 data signal input/output
  * GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs
  */
-#define CONFIG_SYS_GPIO0_OSRH		0x00000550
-#define CONFIG_SYS_GPIO0_OSRL		0x00000110
-#define CONFIG_SYS_GPIO0_ISR1H		0x00000000
-#define CONFIG_SYS_GPIO0_ISR1L		0x15555445
-#define CONFIG_SYS_GPIO0_TSRH		0x00000000
+#define CONFIG_SYS_GPIO0_OSRL		0x00000550
+#define CONFIG_SYS_GPIO0_OSRH		0x00000110
+#define CONFIG_SYS_GPIO0_ISR1L		0x00000000
+#define CONFIG_SYS_GPIO0_ISR1H		0x15555445
 #define CONFIG_SYS_GPIO0_TSRL		0x00000000
+#define CONFIG_SYS_GPIO0_TSRH		0x00000000
 #define CONFIG_SYS_GPIO0_TCR		0x77FE0014
 
 #define CONFIG_SYS_DUART_RST		(0x80000000 >> 14)