X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FPLU405.h;h=928ed8e15b27b5b3ec2dd2483778e09d972c579d;hb=abaa5ba4e3b52f82b8158044cba6cf7986309d43;hp=7f2337bac85d2668007ed61d1e0abc024be50cba;hpb=6c6e042ab3bbfb5428e4cdeb38fa27728c63afdd;p=oweals%2Fu-boot.git

diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 7f2337bac8..928ed8e15b 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -99,8 +99,6 @@
 
 #define CONFIG_SUPPORT_VFAT
 
-#define CONFIG_AUTO_UPDATE      1       /* autoupdate via compactflash  */
-
 #undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
 
 #define CONFIG_RTC_MC146818		/* DS1685 is MC146818 compatible*/
@@ -137,9 +135,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#undef	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
@@ -264,10 +267,10 @@
  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  */
 #define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_FLASH_BASE		0xFFFA0000
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN		(384 * 1024)	/* Reserve 384kB for Monitor */
-#define CONFIG_SYS_MALLOC_LEN		(384 * 1024)	/* Reserve 384kB for malloc() */
+#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_MONITOR_BASE
+#define CONFIG_SYS_MONITOR_BASE		TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN		(~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
 
 /*
  * Environment Variable setup
@@ -280,6 +283,7 @@
  * I2C EEPROM (24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
@@ -298,7 +302,8 @@
 /*
  * External Bus Controller (EBC) Setup
  */
-#define CAN_BA		0xF0000000	    /* CAN Base Address	        */
+#define CAN0_BA		0xF0000000	    /* CAN0 Base Address	*/
+#define CAN1_BA		0xF0000100	    /* CAN1 Base Address	*/
 #define DUART0_BA	0xF0000400	    /* DUART Base Address       */
 #define DUART1_BA	0xF0000408	    /* DUART Base Address       */
 #define RTC_BA		0xF0000500	    /* RTC Base Address         */
@@ -379,12 +384,12 @@
  * GPIO0[28-29] - UART1 data signal input/output
  * GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs
  */
-#define CONFIG_SYS_GPIO0_OSRH		0x00000550
-#define CONFIG_SYS_GPIO0_OSRL		0x00000110
-#define CONFIG_SYS_GPIO0_ISR1H		0x00000000
-#define CONFIG_SYS_GPIO0_ISR1L		0x15555445
-#define CONFIG_SYS_GPIO0_TSRH		0x00000000
+#define CONFIG_SYS_GPIO0_OSRL		0x00000550
+#define CONFIG_SYS_GPIO0_OSRH		0x00000110
+#define CONFIG_SYS_GPIO0_ISR1L		0x00000000
+#define CONFIG_SYS_GPIO0_ISR1H		0x15555445
 #define CONFIG_SYS_GPIO0_TSRL		0x00000000
+#define CONFIG_SYS_GPIO0_TSRH		0x00000000
 #define CONFIG_SYS_GPIO0_TCR		0x77FE0014
 
 #define CONFIG_SYS_DUART_RST		(0x80000000 >> 14)
@@ -425,4 +430,14 @@
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"ohci_pci"
 #define CONFIG_USB_STORAGE	1
 
+/*
+ * UBI
+ */
+#define CONFIG_CMD_UBI
+#define CONFIG_RBTREE
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_LZO
+
 #endif	/* __CONFIG_H */