X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FP1022DS.h;h=3ccfeca890bc97ce753aec633580b5c2526c08f5;hb=6d82517836418f984b7b4c05cf1427d7b49b1169;hp=aadbe027067dacf19888bc9f91643ae939be968b;hpb=a0e80c97c9ba1409c2370f6c8b2a4d6a48cdb15c;p=oweals%2Fu-boot.git diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index aadbe02706..3ccfeca890 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -1,9 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2010-2012 Freescale Semiconductor, Inc. * Authors: Srikanth Srinivasan * Timur Tabi - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -12,10 +11,8 @@ #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_SDCARD -#define CONFIG_SPL_MMC_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) @@ -35,7 +32,6 @@ #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) @@ -62,7 +58,7 @@ #define CONFIG_SPL_NAND_INIT #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SPL_MAX_SIZE (128 << 10) -#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_TPL_TEXT_BASE 0xf8f81000 #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) @@ -81,16 +77,10 @@ #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_TPL_PAD_TO 0x20000 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #endif /* High Level Configuration Options */ -#define CONFIG_MP /* support multiple processors */ - -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff40000 -#endif #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc @@ -223,15 +213,15 @@ #define CONFIG_SYS_MAX_FLASH_SECT 1024 #ifndef CONFIG_SYS_MONITOR_BASE -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_TPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE +#elif defined(CONFIG_SPL_BUILD) #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE #else #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* Nand Flash */ @@ -272,8 +262,6 @@ #endif /* CONFIG_NAND_FSL_ELBC */ -#define CONFIG_BOARD_EARLY_INIT_R -#define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG #define CONFIG_FSL_NGPIXIS @@ -317,7 +305,6 @@ #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024) -#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) @@ -346,7 +333,6 @@ /* * Serial Port */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) @@ -374,9 +360,6 @@ #undef CONFIG_SYS_FLASH_EMPTY_INFO #endif -#ifndef CONFIG_FSL_DIU_FB -#endif - #ifdef CONFIG_ATI #define VIDEO_IO_OFFSET CONFIG_SYS_PCIE1_IO_VIRT #define CONFIG_BIOSEMU @@ -405,12 +388,6 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_EEPROM_BUS_NUM 1 -/* - * eSPI - Enhanced SPI - */ - -#define CONFIG_HARD_SPI - #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 @@ -482,8 +459,6 @@ #endif /* SATA */ -#define CONFIG_LIBATA -#define CONFIG_FSL_SATA #define CONFIG_FSL_SATA_V2 #define CONFIG_SYS_SATA_MAX_DEVICE 2 @@ -499,16 +474,13 @@ #endif #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #endif -#define CONFIG_TSEC_ENET #ifdef CONFIG_TSEC_ENET #define CONFIG_TSECV2 -#define CONFIG_MII /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define CONFIG_TSEC2 1 @@ -529,20 +501,6 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_PARTITIONS -#define CONFIG_FLASH_CFI_MTD -#ifdef CONFIG_PHYS_64BIT -#define MTDIDS_DEFAULT "nor0=fe8000000.nor" -#define MTDPARTS_DEFAULT "mtdparts=fe8000000.nor:48m(ramdisk)," \ - "14m(diagnostic),2m(dink),6m(kernel),58112k(fs)," \ - "512k(dtb),768k(u-boot)" -#else -#define MTDIDS_DEFAULT "nor0=e8000000.nor" -#define MTDPARTS_DEFAULT "mtdparts=e8000000.nor:48m(ramdisk)," \ - "14m(diagnostic),2m(dink),6m(kernel),58112k(fs)," \ - "512k(dtb),768k(u-boot)" -#endif /* * Environment @@ -594,9 +552,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* @@ -615,7 +570,7 @@ * Environment Configuration */ -#define CONFIG_HOSTNAME p1022ds +#define CONFIG_HOSTNAME "p1022ds" #define CONFIG_ROOTPATH "/opt/nfsroot" #define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */