X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8555CDS.h;h=006868421752ecfbb9b20bcfa8b5900cdede3a4c;hb=b485556be51d1edae0a2c0065e2f572ca42a1eee;hp=738fe52a5407cd0f016639c78156622fbe55f5c5;hpb=5f91ef6acdbadec33e0192049e2b24a1d9692f1d;p=oweals%2Fu-boot.git diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 738fe52a54..0068684217 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8555 1 /* MPC8555 specific */ #define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -46,13 +48,6 @@ #define CONFIG_FSL_VIA -/* - * When initializing flash, if we cannot find the manufacturer ID, - * assume this is the AMD flash associated with the CDS board. - * This allows booting from a promjet. - */ -#define CONFIG_ASSUME_AMD_FLASH - #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); #endif @@ -150,7 +145,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -204,42 +199,19 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/ -/* - * LSDMR masks - */ -#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1)) -#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10)) -#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10)) -#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16)) -#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19)) -#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22)) -#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22)) -#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23)) -#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27)) -#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31)) - -#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4)) -#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4)) -#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4)) -#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4)) -#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4)) -#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4)) -#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4)) -#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4)) - /* * Common settings for all Local Bus SDRAM commands. * At run time, either BSMA1516 (for CPU 1.1) * or BSMA1617 (for CPU 1.0) (old) * is OR'ed in too. */ -#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_RFCR16 \ - | CONFIG_SYS_LBC_LSDMR_PRETOACT7 \ - | CONFIG_SYS_LBC_LSDMR_ACTTORW7 \ - | CONFIG_SYS_LBC_LSDMR_BL8 \ - | CONFIG_SYS_LBC_LSDMR_WRC4 \ - | CONFIG_SYS_LBC_LSDMR_CL3 \ - | CONFIG_SYS_LBC_LSDMR_RFEN \ +#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \ + | LSDMR_PRETOACT7 \ + | LSDMR_ACTTORW7 \ + | LSDMR_BL8 \ + | LSDMR_WRC4 \ + | LSDMR_CL3 \ + | LSDMR_RFEN \ ) /* @@ -291,7 +263,6 @@ extern unsigned long get_clock_freq(void); /* Serial Port */ #define CONFIG_CONS_INDEX 2 -#undef CONFIG_SERIAL_SOFTWARE_FIFO #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -314,9 +285,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1 -#define CONFIG_SYS_64BIT_VSPRINTF 1 -#define CONFIG_SYS_64BIT_STRTOUL 1 - /* * I2C */ @@ -339,16 +307,20 @@ extern unsigned long get_clock_freq(void); * General PCI * Addresses are mapped 1-1. */ +#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 #define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BUS +#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 #define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 #define CONFIG_SYS_PCI1_IO_BUS 0x00000000 #define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ +#define CONFIG_SYS_PCI2_MEM_VIRT 0xa0000000 #define CONFIG_SYS_PCI2_MEM_BUS 0xa0000000 -#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BUS +#define CONFIG_SYS_PCI2_MEM_PHYS 0xa0000000 #define CONFIG_SYS_PCI2_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCI2_IO_VIRT 0xe2100000 #define CONFIG_SYS_PCI2_IO_BUS 0x00000000 #define CONFIG_SYS_PCI2_IO_PHYS 0xe2100000 #define CONFIG_SYS_PCI2_IO_SIZE 0x00100000 /* 1M */ @@ -430,6 +402,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_CMD_ELF #define CONFIG_CMD_IRQ #define CONFIG_CMD_SETEXPR +#define CONFIG_CMD_REGINFO #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI @@ -442,7 +415,8 @@ extern unsigned long get_clock_freq(void); * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #if defined(CONFIG_CMD_KGDB) @@ -457,18 +431,10 @@ extern unsigned long get_clock_freq(void); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */