X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8548CDS.h;h=43e2c2eb17c627aac49c1ccf96bdaa76aaee6560;hb=915162daaad18f5cd1446187c846fec853e9ea87;hp=b221a5cc9a9ec5f2139386f0a4f5e84a71d3f909;hpb=73bb4c72407aca3c2f461708bb872a23f2b1bf5a;p=oweals%2Fu-boot.git diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index b221a5cc9a..43e2c2eb17 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -1,5 +1,5 @@ /* - * Copyright 2004, 2007 Freescale Semiconductor. + * Copyright 2004, 2007, 2010-2011 Freescale Semiconductor. * * See file CREDITS for list of people who contributed to this * project. @@ -40,10 +40,12 @@ #define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif +#define CONFIG_SYS_SRIO +#define CONFIG_SRIO1 /* SRIO port 1 */ + #define CONFIG_PCI /* enable any pci type devices */ #define CONFIG_PCI1 /* PCI controller 1 */ #define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#undef CONFIG_RIO #undef CONFIG_PCI2 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ @@ -89,7 +91,7 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#define CONFIG_DDR_DLL /* possible DLL fix needed */ +#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef @@ -353,6 +355,7 @@ extern unsigned long get_clock_freq(void); #endif #ifdef CONFIG_PCIE1 +#define CONFIG_SYS_PCIE1_NAME "Slot" #define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000 #define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000 @@ -363,14 +366,13 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_PCIE1_IO_SIZE 0x00100000 /* 1M */ #endif -#ifdef CONFIG_RIO /* * RapidIO MMU */ -#define CONFIG_SYS_RIO_MEM_VIRT 0xC0000000 -#define CONFIG_SYS_RIO_MEM_BUS 0xC0000000 -#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 512M */ -#endif +#define CONFIG_SYS_SRIO1_MEM_VIRT 0xC0000000 +#define CONFIG_SYS_SRIO1_MEM_BUS 0xC0000000 +#define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BUS +#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ #ifdef CONFIG_LEGACY #define BRIDGE_ID 17 @@ -493,6 +495,7 @@ extern unsigned long get_clock_freq(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */