X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8544DS.h;h=b650874225425733a14d7f78e9b9565a42288630;hb=df4a0796e86662536df2387ddcf969c2a704bcc2;hp=091fd2e870d1d53c674beeffe7e01e0ba2c3d2ee;hpb=42246dacf60d5028d3a48a220ce94efcf56faec4;p=oweals%2Fu-boot.git

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 091fd2e870..b650874225 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -46,15 +46,6 @@
 
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
-#define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
-#undef CONFIG_DDR_DLL
-#define CONFIG_DDR_2T_TIMING		/* Sets the 2T timing bit */
-
-#define CONFIG_DDR_ECC			/* only for ECC DDR module */
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/* DDR controller or DMA? */
-#define CONFIG_MEM_INIT_VALUE		0xDeadBeef
-
-#define CONFIG_DDR_ECC_CMD
 #define CONFIG_INTERRUPTS		/* enable pci, srio, ddr interrupts */
 
 /*
@@ -64,8 +55,6 @@
  */
 #define CONFIG_ASSUME_AMD_FLASH
 
-#define MPC85xx_DDR_SDRAM_CLK_CNTL	/* 85xx has clock control reg */
-
 #ifndef __ASSEMBLY__
 extern unsigned long get_board_sys_clk(unsigned long dummy);
 #endif
@@ -101,17 +90,27 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CFG_PCIE2_ADDR		(CFG_CCSRBAR+0x9000)
 #define CFG_PCIE3_ADDR		(CFG_CCSRBAR+0xb000)
 
-/*
- * DDR Setup
- */
-#define CFG_DDR_SDRAM_BASE	0x00000000	/* DDR is system memory*/
+/* DDR Setup */
+#define CONFIG_FSL_DDR2
+#undef CONFIG_FSL_DDR_INTERACTIVE
+#define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
+#define CONFIG_DDR_SPD
+
+#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/* DDR controller or DMA? */
+#define CONFIG_MEM_INIT_VALUE	0xDeadBeef
+
+#define CFG_DDR_SDRAM_BASE	0x00000000
 #define CFG_SDRAM_BASE		CFG_DDR_SDRAM_BASE
+#define CONFIG_VERY_BIG_RAM
 
+#define CONFIG_NUM_DDR_CONTROLLERS	1
+#define CONFIG_DIMM_SLOTS_PER_CTLR	1
+#define CONFIG_CHIP_SELECTS_PER_CTRL	2
+
+/* I2C addresses of SPD EEPROMs */
 #define SPD_EEPROM_ADDRESS	0x51		/* DDR DIMM */
 
-/*
- * Make sure required options are set
- */
+/* Make sure required options are set */
 #ifndef CONFIG_SPD_EEPROM
 #error ("CONFIG_SPD_EEPROM is required")
 #endif
@@ -168,7 +167,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CFG_MONITOR_BASE	TEXT_BASE	/* start of monitor */
 
-#define CFG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_DRIVER
 #define CFG_FLASH_CFI
 #define CFG_FLASH_EMPTY_INFO
 
@@ -197,7 +196,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define PIXIS_VSPEED1		0x18	/* VELA VSpeed 1 */
 #define PIXIS_VCLKH		0x19	/* VELA VCLKH register */
 #define PIXIS_VCLKL		0x1A	/* VELA VCLKL register */
+#define PIXIS_VSPEED2		0x1d	/* VELA VSpeed 2 */
 #define CFG_PIXIS_VBOOT_MASK	0x40    /* Reset altbank mask*/
+#define PIXIS_VSPEED2_TSEC1SER	0x2
+#define PIXIS_VSPEED2_TSEC3SER	0x1
+#define PIXIS_VCFGEN1_TSEC1SER	0x20
+#define PIXIS_VCFGEN1_TSEC3SER	0x40
 
 
 /* define to use L1 as initial stack */
@@ -242,6 +246,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_OF_BOARD_SETUP		1
 #define CONFIG_OF_STDOUT_VIA_ALIAS	1
 
+#define CFG_64BIT_STRTOUL		1
+#define CFG_64BIT_VSPRINTF		1
+
 /* I2C */
 #define CONFIG_FSL_I2C		/* Use FSL common I2C driver */
 #define CONFIG_HARD_I2C		/* I2C with hardware support */
@@ -367,6 +374,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_TSEC3	1
 #define CONFIG_TSEC3_NAME	"eTSEC3"
 
+#define CONFIG_FSL_SGMII_RISER	1
+#define SGMII_RISER_PHY_OFFSET	0x1c
+
 #define TSEC1_PHY_ADDR		0
 #define TSEC3_PHY_ADDR		1
 
@@ -384,14 +394,14 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * Environment
  */
-#define CFG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_IS_IN_FLASH	1
 #if CFG_MONITOR_BASE > 0xfff80000
-#define CFG_ENV_ADDR		0xfff80000
+#define CONFIG_ENV_ADDR		0xfff80000
 #else
-#define CFG_ENV_ADDR		(CFG_MONITOR_BASE + 0x70000)
+#define CONFIG_ENV_ADDR		(CFG_MONITOR_BASE + 0x70000)
 #endif
-#define CFG_ENV_SIZE		0x2000
-#define CFG_ENV_SECT_SIZE	0x10000 /* 64K (one sector) */
+#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_SECT_SIZE	0x10000 /* 64K (one sector) */
 
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download */
 #define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change */