X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FM54418TWR.h;h=9754bbd8999d71b1cafa72db7dad4add127efc8d;hb=c721fd6ee01cca436176a820a741a95e038108ba;hp=3be2f8ef33c77edf735297112559d9ca0d9091ff;hpb=b765fce95c58b5a7da44b89eb754e66880ecd7f1;p=oweals%2Fu-boot.git diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 3be2f8ef33..9754bbd899 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -4,23 +4,7 @@ * Copyright 2010-2012 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -34,8 +18,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MCF5441x /* define processor family */ -#define CONFIG_M54418 /* define processor type */ #define CONFIG_M54418TWR /* M54418TWR board */ #define CONFIG_MCFUART @@ -56,32 +38,10 @@ #define CONFIG_BOOTP_HOSTNAME /* Command line configuration */ -#include - -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_CACHE #undef CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ELF -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_I2C #undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_UBI -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC -#define CONFIG_CMD_MII #undef CONFIG_CMD_NAND -#undef CONFIG_CMD_NAND_YAFFS -#define CONFIG_CMD_NET -#define CONFIG_CMD_NFS -#define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SPI -#define CONFIG_CMD_SF -#undef CONFIG_CMD_IMLS - -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS /* * NAND FLASH @@ -93,13 +53,11 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_NAND_SELECT_DEVICE -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Network configuration */ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY @@ -116,7 +74,6 @@ #define CONFIG_SYS_FEC0_PHYADDR 0 #define CONFIG_SYS_FEC1_PHYADDR 1 -#define CONFIG_BOOTDELAY 2 /* autoboot after 5 seconds */ #ifdef CONFIG_SYS_NAND_BOOT #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rw rootfstype=jffs2 " \ @@ -133,15 +90,12 @@ "::eth0:off:rw console=ttyS0,115200" #endif -#define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 -#define CONFIG_ETH1ADDR 00:e0:0c:bc:e5:61 #define CONFIG_ETHPRIME "FEC0" #define CONFIG_IPADDR 192.168.1.2 #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.1.1 #define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_OVERWRITE_ETHADDR_ONCE #define CONFIG_SYS_FEC_BUF_USE_SRAM /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ #ifndef CONFIG_SYS_DISCOVER_PHY @@ -213,9 +167,9 @@ #undef CONFIG_MCFPIT /* I2c */ -#undef CONFIG_FSL_I2C +#undef CONFIG_SYS_FSL_I2C #undef CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ +#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ /* I2C speed and slave address */ #define CONFIG_SYS_I2C_SPEED 80000 #define CONFIG_SYS_I2C_SLAVE 0x7F @@ -229,8 +183,6 @@ #define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI -# define CONFIG_SPI_FLASH -# define CONFIG_SPI_FLASH_ATMEL # define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ DSPI_CTAR_PCSSCK_1CLK | \ @@ -248,11 +200,6 @@ #define CONFIG_PRAM 2048 /* 2048 KB */ -/* HUSH */ -#define CONFIG_SYS_HUSH_PARSER 1 -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - -#define CONFIG_SYS_PROMPT "-> " #define CONFIG_SYS_LONGHELP /* undef to save memory */ #if defined(CONFIG_CMD_KGDB) @@ -269,8 +216,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) -#define CONFIG_SYS_HZ 1000 - #define CONFIG_SYS_MBAR 0xFC000000 /* @@ -286,10 +231,8 @@ /* End of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -/* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE 256 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \ - CONFIG_SYS_GBL_DATA_SIZE) - 32) + GENERATED_GBL_DATA_SIZE) - 32) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) @@ -310,7 +253,7 @@ #endif #if defined(CONFIG_SERIAL_BOOT) -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #endif