X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2FHUB405.h;h=5dea96ef5b6510ce8742c2d366dccd64070464a5;hb=11080ab66dc2c7f36e03f2cf7a8d86d94a58869f;hp=0e7d2c010399348cdc0771d245ce6638c1836534;hpb=156feb90d200f186cdfd856d7f6f1878bb1bec1e;p=oweals%2Fu-boot.git

diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index 0e7d2c0103..5dea96ef5b 100644
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -60,6 +60,7 @@
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
 
 #define CONFIG_PHY_CLK_FREQ	EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
+#define CONFIG_NET_MULTI
 
 
 /*
@@ -117,9 +118,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#undef	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
@@ -243,6 +249,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
@@ -332,12 +339,12 @@
  * GPIO0[28-29] - UART1 data signal input/output
  * GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs
  */
-#define CONFIG_SYS_GPIO0_OSRH		0x40000550
-#define CONFIG_SYS_GPIO0_OSRL		0x00000110
-#define CONFIG_SYS_GPIO0_ISR1H		0x00000000
-#define CONFIG_SYS_GPIO0_ISR1L		0x15555445
-#define CONFIG_SYS_GPIO0_TSRH		0x00000000
+#define CONFIG_SYS_GPIO0_OSRL		0x40000550
+#define CONFIG_SYS_GPIO0_OSRH		0x00000110
+#define CONFIG_SYS_GPIO0_ISR1L		0x00000000
+#define CONFIG_SYS_GPIO0_ISR1H		0x15555445
 #define CONFIG_SYS_GPIO0_TSRL		0x00000000
+#define CONFIG_SYS_GPIO0_TSRH		0x00000000
 #define CONFIG_SYS_GPIO0_TCR		0xF7FE0014
 
 #define CONFIG_SYS_DUART_RST           (0x80000000 >> 14)