X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fasm-ppc%2Fxilinx_irq.h;h=61171c21ffaa32474d7a3d1eddc86fd9fb67a296;hb=dbbbb3abeff325855cae76e33d69d5665631443f;hp=ddccc75016940ef34ccb0cf42b6a96bafe78bb69;hpb=d865fd09809a3a18669f35f970781820af40e4de;p=oweals%2Fu-boot.git

diff --git a/include/asm-ppc/xilinx_irq.h b/include/asm-ppc/xilinx_irq.h
index ddccc75016..61171c21ff 100644
--- a/include/asm-ppc/xilinx_irq.h
+++ b/include/asm-ppc/xilinx_irq.h
@@ -19,18 +19,18 @@
 #ifndef XILINX_IRQ_H
 #define XILINX_IRQ_H
 
-#define intc XPAR_INTC_0_BASEADDR
-#define ISR (intc+(0*4))	/* Interrupt Status Register */
-#define IPR (intc+(1*4))	/* Interrupt Pending Register */
-#define IER (intc+(2*4))	/* Interrupt Enable Register */
-#define IAR (intc+(3*4))	/* Interrupt Acknowledge Register */
-#define SIE (intc+(4*4))	/* Set Interrupt Enable bits */
-#define CIE (intc+(5*4))	/* Clear Interrupt Enable bits */
-#define IVR (intc+(6*4))	/* Interrupt Vector Register */
-#define MER (intc+(7*4))	/* Master Enable Register */
+#define intc	XPAR_INTC_0_BASEADDR
+#define ISR	(intc + (0 * 4))	/* Interrupt Status Register */
+#define IPR	(intc + (1 * 4))	/* Interrupt Pending Register */
+#define IER	(intc + (2 * 4))	/* Interrupt Enable Register */
+#define IAR	(intc + (3 * 4))	/* Interrupt Acknowledge Register */
+#define SIE	(intc + (4 * 4))	/* Set Interrupt Enable bits */
+#define CIE	(intc + (5 * 4))	/* Clear Interrupt Enable bits */
+#define IVR	(intc + (6 * 4))	/* Interrupt Vector Register */
+#define MER	(intc + (7 * 4))	/* Master Enable Register */
 
-#define IRQ_MASK(irq) (1<<(irq&0x1f))
+#define IRQ_MASK(irq)	(1 << (irq & 0x1f))
 
-#define IRQ_MAX XPAR_INTC_MAX_NUM_INTR_INPUTS
+#define IRQ_MAX		XPAR_INTC_MAX_NUM_INTR_INPUTS
 
 #endif