X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fasm-ppc%2Fprocessor.h;h=83e3581f39a463c66b48a8c1fd23595cb31ddc7b;hb=ed9953d6903c9673135a96ae1644f61cb0eac5ce;hp=dce4717f427df7cb36044c669888c5d2d66a0cef;hpb=9939ffd5fbf1f5aff4d8172531d4fc33797c62c8;p=oweals%2Fu-boot.git

diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index dce4717f42..83e3581f39 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -451,6 +451,8 @@
 #define   L2CSR0_L2LO		0x00000020	/* L2 Cache Lock Overflow */
 #define SPRN_L2CSR1	0x3fa	/* L2 Data Cache Control and Status Register 1 */
 
+#define SPRN_TLB0CFG	0x2B0	/* TLB 0 Config Register */
+#define SPRN_TLB1CFG	0x2B1	/* TLB 1 Config Register */
 #define SPRN_MMUCSR0	0x3f4	/* MMU control and status register 0 */
 #define SPRN_MAS0	0x270	/* MMU Assist Register 0 */
 #define SPRN_MAS1	0x271	/* MMU Assist Register 1 */
@@ -777,6 +779,13 @@
 #define PVR_MAJ(pvr)	(((pvr) >>  4) & 0xF)	/* Major revision field */
 #define PVR_MIN(pvr)	(((pvr) >>  0) & 0xF)	/* Minor revision field */
 
+/* e600 core PVR fields */
+
+#define PVR_E600_VER(pvr)	(((pvr) >> 15) & 0xFFFF) /* Version/type */
+#define PVR_E600_TECH(pvr)	(((pvr) >> 12) & 0xF)	 /* Technology */
+#define PVR_E600_MAJ(pvr)	(((pvr) >> 8) & 0xF)	 /* Major revision */
+#define PVR_E600_MIN(pvr)	(((pvr) >> 0) & 0xFF)	 /* Minor revision */
+
 /* Processor Version Numbers */
 
 #define PVR_403GA	0x00200000
@@ -857,7 +866,6 @@
 #define PVR_85xx_REV2	(PVR_85xx | 0x0020)
 
 #define PVR_86xx	0x80040000
-#define PVR_86xx_REV1	(PVR_86xx | 0x0010)
 
 #define PVR_VIRTEX5     0x7ff21912
 
@@ -926,6 +934,8 @@
 
 #define SVR_8533	0x803400
 #define SVR_8533_E	0x803C00
+#define SVR_8536	0x803700
+#define SVR_8536_E	0x803F00
 #define SVR_8540	0x803000
 #define SVR_8541	0x807200
 #define SVR_8541_E	0x807A00
@@ -945,8 +955,12 @@
 #define SVR_8567_E	0x807E00
 #define SVR_8568	0x807500
 #define SVR_8568_E	0x807D00
+#define SVR_8569	0x808000
+#define SVR_8569_E	0x808800
 #define SVR_8572	0x80E000
 #define SVR_8572_E	0x80E800
+#define SVR_P2020	0x80E200
+#define SVR_P2020_E	0x80EA00
 
 #define SVR_8610	0x80A000
 #define SVR_8641	0x809000