X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fasm-ppc%2F4xx_pcie.h;h=a0e88de11d4390bb38b2b2fb06f81ada33804223;hb=26f6a2b7f3d215a0bd291e8b37be5a359878037c;hp=539869683800e43018cd1ba2ac0b1b3ccaffb293;hpb=fe06d43b504af9ebc6c9bfe511853de6e42f257e;p=oweals%2Fu-boot.git

diff --git a/include/asm-ppc/4xx_pcie.h b/include/asm-ppc/4xx_pcie.h
index 5398696838..a0e88de11d 100644
--- a/include/asm-ppc/4xx_pcie.h
+++ b/include/asm-ppc/4xx_pcie.h
@@ -12,14 +12,15 @@
 #define __4XX_PCIE_H
 
 #include <ppc4xx.h>
+#include <pci.h>
 
 #define DCRN_SDR0_CFGADDR	0x00e
 #define DCRN_SDR0_CFGDATA	0x00f
 
 #if defined(CONFIG_440SPE)
-#define CFG_PCIE_NR_PORTS	3
+#define CONFIG_SYS_PCIE_NR_PORTS	3
 
-#define CFG_PCIE_ADDR_HIGH	0x0000000d
+#define CONFIG_SYS_PCIE_ADDR_HIGH	0x0000000d
 
 #define DCRN_PCIE0_BASE		0x100
 #define DCRN_PCIE1_BASE		0x120
@@ -31,9 +32,9 @@
 #endif
 
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
-#define CFG_PCIE_NR_PORTS	2
+#define CONFIG_SYS_PCIE_NR_PORTS	2
 
-#define CFG_PCIE_ADDR_HIGH	0x0000000d
+#define CONFIG_SYS_PCIE_ADDR_HIGH	0x0000000d
 
 #define DCRN_PCIE0_BASE		0x100
 #define DCRN_PCIE1_BASE		0x120
@@ -43,9 +44,9 @@
 #endif
 
 #if defined(CONFIG_405EX)
-#define CFG_PCIE_NR_PORTS	2
+#define CONFIG_SYS_PCIE_NR_PORTS	2
 
-#define CFG_PCIE_ADDR_HIGH	0x00000000
+#define CONFIG_SYS_PCIE_ADDR_HIGH	0x00000000
 
 #define	DCRN_PCIE0_BASE		0x040
 #define	DCRN_PCIE1_BASE		0x060
@@ -405,7 +406,7 @@ static inline u32 sdr_base(int port)
 		return PCIE0_SDR;
 	case 1:
 		return PCIE1_SDR;
-#if CFG_PCIE_NR_PORTS > 2
+#if CONFIG_SYS_PCIE_NR_PORTS > 2
 	case 2:
 		return PCIE2_SDR;
 #endif