X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fwatchdog%2Fast_wdt.c;h=d344d54aee828fdeb2ff72dbe79ec557fc998d52;hb=5f2fe7d4617bbddc45b6a0cbf21cd468c57f4eba;hp=aab077e3d1eb48de971a62c542431d27b5256bf5;hpb=821560fd8e43eecc208c1c52ad24faadb6b52703;p=oweals%2Fu-boot.git

diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c
index aab077e3d1..d344d54aee 100644
--- a/drivers/watchdog/ast_wdt.c
+++ b/drivers/watchdog/ast_wdt.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2017 Google, Inc
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -14,8 +13,6 @@
 #define WDT_AST2500	2500
 #define WDT_AST2400	2400
 
-DECLARE_GLOBAL_DATA_PTR;
-
 struct ast_wdt_priv {
 	struct ast_wdt *regs;
 };
@@ -26,6 +23,12 @@ static int ast_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
 	ulong driver_data = dev_get_driver_data(dev);
 	u32 reset_mode = ast_reset_mode_from_flags(flags);
 
+	/* 32 bits at 1MHz is 4294967ms */
+	timeout = min_t(u64, timeout, 4294967);
+
+	/* WDT counts in ticks of 1MHz clock. 1ms / 1e3 * 1e6 */
+	timeout *= 1000;
+
 	clrsetbits_le32(&priv->regs->ctrl,
 			WDT_CTRL_RESET_MASK << WDT_CTRL_RESET_MODE_SHIFT,
 			reset_mode << WDT_CTRL_RESET_MODE_SHIFT);
@@ -53,6 +56,7 @@ static int ast_wdt_stop(struct udevice *dev)
 
 	clrbits_le32(&priv->regs->ctrl, WDT_CTRL_EN);
 
+	writel(WDT_RESET_DEFAULT, &priv->regs->reset_mask);
 	return 0;
 }
 
@@ -121,5 +125,4 @@ U_BOOT_DRIVER(ast_wdt) = {
 	.priv_auto_alloc_size = sizeof(struct ast_wdt_priv),
 	.ofdata_to_platdata = ast_wdt_ofdata_to_platdata,
 	.ops = &ast_wdt_ops,
-	.flags = DM_FLAG_PRE_RELOC,
 };