X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fusb%2Fhost%2Fehci-omap.c;h=ab459c8cc927cb1a954c2ee21de03b296d84698e;hb=866a78dc28411f4c76ba887f439f69f1116d8a6b;hp=00f787fc9701c8e5b71a38cf59b6cd8e1c8ef00b;hpb=e390e8709149664ff96cf19384264c84573f3082;p=oweals%2Fu-boot.git diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 00f787fc97..ab459c8cc9 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2011 Ilya Yanok, Emcraft Systems * (C) Copyright 2004-2008 @@ -7,24 +8,8 @@ * Sunil Kumar * Shashi Ranjan * - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. */ + #include #include #include @@ -33,7 +18,8 @@ #include #include #include -#include "ehci-core.h" + +#include "ehci.h" static struct omap_uhh *const uhh = (struct omap_uhh *)OMAP_UHH_BASE; static struct omap_usbtll *const usbtll = (struct omap_usbtll *)OMAP_USBTLL_BASE; @@ -41,18 +27,48 @@ static struct omap_ehci *const ehci = (struct omap_ehci *)OMAP_EHCI_BASE; static int omap_uhh_reset(void) { - unsigned long init = get_timer(0); + int timeout = 0; + u32 rev; + + rev = readl(&uhh->rev); - /* perform UHH soft reset, and wait until reset is complete */ + /* Soft RESET */ writel(OMAP_UHH_SYSCONFIG_SOFTRESET, &uhh->sysc); - /* Wait for UHH reset to complete */ - while (!(readl(&uhh->syss) & OMAP_UHH_SYSSTATUS_EHCI_RESETDONE)) - if (get_timer(init) > CONFIG_SYS_HZ) { - debug("OMAP UHH error: timeout resetting ehci\n"); - return -EL3RST; + switch (rev) { + case OMAP_USBHS_REV1: + /* Wait for soft RESET to complete */ + while (!(readl(&uhh->syss) & 0x1)) { + if (timeout > 100) { + printf("%s: RESET timeout\n", __func__); + return -1; + } + udelay(10); + timeout++; } + /* Set No-Idle, No-Standby */ + writel(OMAP_UHH_SYSCONFIG_VAL, &uhh->sysc); + break; + + default: /* Rev. 2 onwards */ + + udelay(2); /* Need to wait before accessing SYSCONFIG back */ + + /* Wait for soft RESET to complete */ + while ((readl(&uhh->sysc) & 0x1)) { + if (timeout > 100) { + printf("%s: RESET timeout\n", __func__); + return -1; + } + udelay(10); + timeout++; + } + + writel(OMAP_UHH_SYSCONFIG_VAL, &uhh->sysc); + break; + } + return 0; } @@ -89,6 +105,7 @@ static void omap_usbhs_hsic_init(int port) writel(reg, &usbtll->channel_conf + port); } +#ifdef CONFIG_USB_ULPI static void omap_ehci_soft_phy_reset(int port) { struct ulpi_viewport ulpi_vp; @@ -98,15 +115,16 @@ static void omap_ehci_soft_phy_reset(int port) ulpi_reset(&ulpi_vp); } - -inline int __board_usb_init(void) +#else +static void omap_ehci_soft_phy_reset(int port) { - return 0; + return; } -int board_usb_init(void) __attribute__((weak, alias("__board_usb_init"))); +#endif #if defined(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO) || \ - defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO) + defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO) || \ + defined(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO) /* controls PHY(s) reset signal(s) */ static inline void omap_ehci_phy_reset(int on, int delay) { @@ -125,6 +143,10 @@ static inline void omap_ehci_phy_reset(int on, int delay) gpio_request(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO, "USB PHY2 reset"); gpio_direction_output(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO, !on); #endif +#ifdef CONFIG_OMAP_EHCI_PHY3_RESET_GPIO + gpio_request(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, "USB PHY3 reset"); + gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, !on); +#endif /* Hold the PHY in RESET for enough time till DIR is high */ /* Refer: ISSUE1 */ @@ -155,14 +177,15 @@ int omap_ehci_hcd_stop(void) * Based on "drivers/usb/host/ehci-omap.c" from Linux 3.1 * See there for additional Copyrights. */ -int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata) +int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata, + struct ehci_hccr **hccr, struct ehci_hcor **hcor) { int ret; unsigned int i, reg = 0, rev = 0; debug("Initializing OMAP EHCI\n"); - ret = board_usb_init(); + ret = board_usb_init(index, USB_INIT_HOST); if (ret < 0) return ret; @@ -200,17 +223,34 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata) if (is_ehci_phy_mode(usbhs_pdata->port_mode[1])) clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS); else - setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS); + setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS); if (is_ehci_phy_mode(usbhs_pdata->port_mode[2])) clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); else - setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS); + setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); } else if (rev == OMAP_USBHS_REV2) { + clrsetbits_le32(®, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR), OMAP4_UHH_HOSTCONFIG_APP_START_CLK); - /* Clear port mode fields for PHY mode*/ + /* Clear port mode fields for PHY mode */ + + if (is_ehci_hsic_mode(usbhs_pdata->port_mode[0])) + setbits_le32(®, OMAP_P1_MODE_HSIC); + + if (is_ehci_hsic_mode(usbhs_pdata->port_mode[1])) + setbits_le32(®, OMAP_P2_MODE_HSIC); + + } else if (rev == OMAP_USBHS_REV2_1) { + + clrsetbits_le32(®, + (OMAP_P1_MODE_CLEAR | + OMAP_P2_MODE_CLEAR | + OMAP_P3_MODE_CLEAR), + OMAP4_UHH_HOSTCONFIG_APP_START_CLK); + + /* Clear port mode fields for PHY mode */ if (is_ehci_hsic_mode(usbhs_pdata->port_mode[0])) setbits_le32(®, OMAP_P1_MODE_HSIC); @@ -246,9 +286,8 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata) if (is_ehci_phy_mode(usbhs_pdata->port_mode[i])) omap_ehci_soft_phy_reset(i); - dcache_disable(); - hccr = (struct ehci_hccr *)(OMAP_EHCI_BASE); - hcor = (struct ehci_hcor *)(OMAP_EHCI_BASE + 0x10); + *hccr = (struct ehci_hccr *)(OMAP_EHCI_BASE); + *hcor = (struct ehci_hcor *)(OMAP_EHCI_BASE + 0x10); debug("OMAP EHCI init done\n"); return 0;