X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fusb%2Fhost%2Fehci-mx5.c;h=2b36cebdb3a619518b33f5458fe99215b6fe4f61;hb=17b68b5a583207c9842d45ca7737dd79091e2765;hp=3548620ecafc4d1c027aaeb6076945ae96a31ea5;hpb=c2120fbfbc4d1f6953228f86be8bdbf38bacfdab;p=oweals%2Fu-boot.git diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c index 3548620eca..2b36cebdb3 100644 --- a/drivers/usb/host/ehci-mx5.c +++ b/drivers/usb/host/ehci-mx5.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include #include @@ -218,24 +218,28 @@ void __weak board_ehci_hcd_postinit(struct usb_ehci *ehci, int port) { } -int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) +__weak void mx5_ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg, + uint32_t *reg) { - struct usb_ehci *ehci; -#ifdef CONFIG_MX53 - struct clkctl *sc_regs = (struct clkctl *)CCM_BASE_ADDR; - u32 reg; + mdelay(50); +} - reg = __raw_readl(&sc_regs->cscmr1) & ~(1 << 26); - /* derive USB PHY clock multiplexer from PLL3 */ - reg |= 1 << 26; - __raw_writel(reg, &sc_regs->cscmr1); -#endif +static const struct ehci_ops mx5_ehci_ops = { + .powerup_fixup = mx5_ehci_powerup_fixup, +}; + +int ehci_hcd_init(int index, enum usb_init_type init, + struct ehci_hccr **hccr, struct ehci_hcor **hcor) +{ + struct usb_ehci *ehci; + /* The only user for this is efikamx-usb */ + ehci_set_controller_priv(index, NULL, &mx5_ehci_ops); set_usboh3_clk(); - enable_usboh3_clk(1); + enable_usboh3_clk(true); set_usb_phy_clk(); - enable_usb_phy1_clk(1); - enable_usb_phy2_clk(1); + enable_usb_phy1_clk(true); + enable_usb_phy2_clk(true); mdelay(1); /* Do board specific initialization */