X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fspi%2Frk_spi.c;h=14437c0a9afe65808786fea09109f97dbef94680;hb=7eece328128ceffbd3b7425de5bfc9b29730730d;hp=c70d63627704cfded3d481128a555d88f7f4ed49;hpb=390194d43fa4478ddb638164ddb114c979f3e57a;p=oweals%2Fu-boot.git

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index c70d636277..14437c0a9a 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * spi driver for rockchip
  *
@@ -5,8 +6,6 @@
  *
  * (C) Copyright 2008-2013 Rockchip Electronics
  * Peter, Software Engineering, <superpeter.cai@gmail.com>.
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <common.h>
@@ -22,8 +21,6 @@
 #include <dm/pinctrl.h>
 #include "rk_spi.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
 /* Change to 1 to output registers at the start of each transaction */
 #define DEBUG_RK_SPI	0
 
@@ -94,7 +91,7 @@ static void rkspi_set_clk(struct rockchip_spi_priv *priv, uint speed)
 	 */
 	if (clk_div > 0xfffe) {
 		clk_div = 0xfffe;
-		debug("%s: can't divide down to %d hz (actual will be %d hz)\n",
+		debug("%s: can't divide down to %d Hz (actual will be %d Hz)\n",
 		      __func__, speed, priv->input_rate / clk_div);
 	}
 
@@ -184,7 +181,7 @@ static int rockchip_spi_ofdata_to_platdata(struct udevice *bus)
 	struct rockchip_spi_priv *priv = dev_get_priv(bus);
 	int ret;
 
-	plat->base = devfdt_get_addr(bus);
+	plat->base = dev_read_addr(bus);
 
 	ret = clk_get_by_index(bus, 0, &priv->clk);
 	if (ret < 0) {