X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fsmc91111.c;h=060da8ff2aaec74500bd5c400cdea60a42dd8f3c;hb=8a316c9b6215266b8f5f7bbae5ee12e8b8afac83;hp=44ce60b1f01357ef8b16c46c71fb4981a50d9378;hpb=262381329b87511ed862cde139a3a1ff49e9d7eb;p=oweals%2Fu-boot.git

diff --git a/drivers/smc91111.c b/drivers/smc91111.c
index 44ce60b1f0..060da8ff2a 100644
--- a/drivers/smc91111.c
+++ b/drivers/smc91111.c
@@ -640,8 +640,15 @@ again:
 	}
 
 	/* we have a packet address, so tell the card to use it */
+#ifndef CONFIG_XAENIAX
 	SMC_outb (packet_no, PN_REG);
-
+#else
+	/* On Xaeniax board, we can't use SMC_outb here because that way
+	 * the Allocate MMU command will end up written to the command register
+	 * as well, which will lead to a problem.
+	 */
+	SMC_outl (packet_no << 16, 0);
+#endif
 	/* do not write new ptr value if Write data fifo not empty */
 	while ( saved_ptr & PTR_NOTEMPTY )
 		printf ("Write data fifo not empty!\n");
@@ -676,19 +683,39 @@ again:
 	 */
 #ifdef USE_32_BIT
 	SMC_outsl (SMC91111_DATA_REG, buf, length >> 2);
+#ifndef CONFIG_XAENIAX
 	if (length & 0x2)
 		SMC_outw (*((word *) (buf + (length & 0xFFFFFFFC))),
 			  SMC91111_DATA_REG);
+#else
+	/* On XANEIAX, we can only use 32-bit writes, so we need to handle
+	 * unaligned tail part specially. The standard code doesn't work.
+	 */
+	if ((length & 3) == 3) {
+		u16 * ptr = (u16*) &buf[length-3];
+		SMC_outl((*ptr) | ((0x2000 | buf[length-1]) << 16),
+				SMC91111_DATA_REG);
+	} else if ((length & 2) == 2) {
+		u16 * ptr = (u16*) &buf[length-2];
+		SMC_outl(*ptr, SMC91111_DATA_REG);
+	} else if (length & 1) {
+		SMC_outl((0x2000 | buf[length-1]), SMC91111_DATA_REG);
+	} else {
+		SMC_outl(0, SMC91111_DATA_REG);
+	}
+#endif
 #else
 	SMC_outsw (SMC91111_DATA_REG, buf, (length) >> 1);
 #endif /* USE_32_BIT */
 
+#ifndef CONFIG_XAENIAX
 	/* Send the last byte, if there is one.	  */
 	if ((length & 1) == 0) {
 		SMC_outw (0, SMC91111_DATA_REG);
 	} else {
 		SMC_outw (buf[length - 1] | 0x2000, SMC91111_DATA_REG);
 	}
+#endif
 
 	/* and let the chipset deal with it */
 	SMC_outw (MC_ENQUEUE, MMU_CMD_REG);
@@ -702,7 +729,9 @@ again:
 
 		/* release packet */
 		/* no need to release, MMU does that now */
-		/* SMC_outw (MC_FREEPKT, MMU_CMD_REG); */
+#ifdef CONFIG_XAENIAX
+		 SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+#endif
 
 		/* wait for MMU getting ready (low) */
 		while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
@@ -722,7 +751,9 @@ again:
 
 		/* release packet */
 		/* no need to release, MMU does that now */
-		/* SMC_outw (MC_FREEPKT, MMU_CMD_REG); */
+#ifdef CONFIG_XAENIAX
+		SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+#endif
 
 		/* wait for MMU getting ready (low) */
 		while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
@@ -735,7 +766,15 @@ again:
 	}
 
 	/* restore previously saved registers */
+#ifndef CONFIG_XAENIAX
 	SMC_outb( saved_pnr, PN_REG );
+#else
+	/* On Xaeniax board, we can't use SMC_outb here because that way
+	 * the Allocate MMU command will end up written to the command register
+	 * as well, which will lead to a problem.
+	 */
+	SMC_outl(saved_pnr << 16, 0);
+#endif
 	SMC_outw( saved_ptr, PTR_REG );
 
 	return length;
@@ -913,7 +952,15 @@ static int smc_rcv()
 		udelay(1); /* Wait until not busy */
 
 	/* restore saved registers */
+#ifndef CONFIG_XAENIAX
 	SMC_outb( saved_pnr, PN_REG );
+#else
+	/* On Xaeniax board, we can't use SMC_outb here because that way
+	 * the Allocate MMU command will end up written to the command register
+	 * as well, which will lead to a problem.
+	 */
+	SMC_outl( saved_pnr << 16, 0);
+#endif
 	SMC_outw( saved_ptr, PTR_REG );
 
 	if (!is_error) {