X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fserial%2Fns16550.c;h=0eb7c025618bc3d3f0f3a098017913bd133abf0f;hb=5c84ad097d829bb1e6460438f33e1536b23b3c9b;hp=93dad338b37597aeea3303c9b395ba1f333a6207;hpb=9c3193f8d03d4074fa6ca6b783246b97d8dc2ff5;p=oweals%2Fu-boot.git diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 93dad338b3..0eb7c02561 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -19,9 +20,6 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ #define UART_MCRVAL (UART_MCR_DTR | \ UART_MCR_RTS) /* RTS/DTR */ -#define UART_FCRVAL (UART_FCR_FIFO_EN | \ - UART_FCR_RXSR | \ - UART_FCR_TXSR) /* Clear & enable FIFOs */ #ifndef CONFIG_DM_SERIAL #ifdef CONFIG_SYS_NS16550_PORT_MAPPED @@ -54,12 +52,6 @@ DECLARE_GLOBAL_DATA_PTR; #define CONFIG_SYS_NS16550_IER 0x00 #endif /* CONFIG_SYS_NS16550_IER */ -#ifdef CONFIG_DM_SERIAL - -#ifndef CONFIG_SYS_NS16550_CLK -#define CONFIG_SYS_NS16550_CLK 0 -#endif - static inline void serial_out_shift(void *addr, int shift, int value) { #ifdef CONFIG_SYS_NS16550_PORT_MAPPED @@ -94,18 +86,25 @@ static inline int serial_in_shift(void *addr, int shift) #endif } +#ifdef CONFIG_DM_SERIAL + +#ifndef CONFIG_SYS_NS16550_CLK +#define CONFIG_SYS_NS16550_CLK 0 +#endif + static void ns16550_writeb(NS16550_t port, int offset, int value) { struct ns16550_platdata *plat = port->plat; unsigned char *addr; offset *= 1 << plat->reg_shift; - addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset; + addr = (unsigned char *)plat->base + offset; + /* * As far as we know it doesn't make sense to support selection of * these options at run-time, so use the existing CONFIG options. */ - serial_out_shift(addr, plat->reg_shift, value); + serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value); } static int ns16550_readb(NS16550_t port, int offset) @@ -114,9 +113,16 @@ static int ns16550_readb(NS16550_t port, int offset) unsigned char *addr; offset *= 1 << plat->reg_shift; - addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset; + addr = (unsigned char *)plat->base + offset; + + return serial_in_shift(addr + plat->reg_offset, plat->reg_shift); +} - return serial_in_shift(addr, plat->reg_shift); +static u32 ns16550_getfcr(NS16550_t port) +{ + struct ns16550_platdata *plat = port->plat; + + return plat->fcr; } /* We can clean these up once everything is moved to driver model */ @@ -126,27 +132,18 @@ static int ns16550_readb(NS16550_t port, int offset) #define serial_in(addr) \ ns16550_readb(com_port, \ (unsigned char *)addr - (unsigned char *)com_port) -#endif - -static inline int calc_divisor(NS16550_t port, int clock, int baudrate) +#else +static u32 ns16550_getfcr(NS16550_t port) { - const unsigned int mode_x_div = 16; - - return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); + return UART_FCR_DEFVAL; } +#endif int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) { -#ifdef CONFIG_OMAP1510 - /* If can't cleanly clock 115200 set div to 1 */ - if ((clock == 12000000) && (baudrate == 115200)) { - port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */ - return 1; /* return 1 for base divisor */ - } - port->osc_12m_sel = 0; /* clear if previsouly set */ -#endif + const unsigned int mode_x_div = 16; - return calc_divisor(port, clock, baudrate); + return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); } static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) @@ -178,21 +175,17 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) ; serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); -#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \ - defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) +#if defined(CONFIG_ARCH_OMAP2PLUS) serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ #endif serial_out(UART_MCRVAL, &com_port->mcr); - serial_out(UART_FCRVAL, &com_port->fcr); + serial_out(ns16550_getfcr(com_port), &com_port->fcr); if (baud_divisor != -1) NS16550_setbrg(com_port, baud_divisor); -#if defined(CONFIG_OMAP) || \ - defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ - defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) - +#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) /* /16 is proper to hit 115200 with 48MHz */ serial_out(0, &com_port->mdr1); -#endif /* CONFIG_OMAP */ +#endif #if defined(CONFIG_SOC_KEYSTONE) serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); #endif @@ -204,7 +197,7 @@ void NS16550_reinit(NS16550_t com_port, int baud_divisor) serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); NS16550_setbrg(com_port, 0); serial_out(UART_MCRVAL, &com_port->mcr); - serial_out(UART_FCRVAL, &com_port->fcr); + serial_out(ns16550_getfcr(com_port), &com_port->fcr); NS16550_setbrg(com_port, baud_divisor); } #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ @@ -249,17 +242,6 @@ int NS16550_tstc(NS16550_t com_port) #include -#define serial_dout(reg, value) \ - serial_out_shift((char *)com_port + \ - ((char *)reg - (char *)com_port) * \ - (1 << CONFIG_DEBUG_UART_SHIFT), \ - CONFIG_DEBUG_UART_SHIFT, value) -#define serial_din(reg) \ - serial_in_shift((char *)com_port + \ - ((char *)reg - (char *)com_port) * \ - (1 << CONFIG_DEBUG_UART_SHIFT), \ - CONFIG_DEBUG_UART_SHIFT) - static inline void _debug_uart_init(void) { struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; @@ -271,16 +253,52 @@ static inline void _debug_uart_init(void) * feasible. The better fix is to move all users of this driver to * driver model. */ - baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, - CONFIG_BAUDRATE); + baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, + CONFIG_BAUDRATE); + serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); + serial_dout(&com_port->mcr, UART_MCRVAL); + serial_dout(&com_port->fcr, UART_FCR_DEFVAL); + + serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); + serial_dout(&com_port->dll, baud_divisor & 0xff); + serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); + serial_dout(&com_port->lcr, UART_LCRVAL); +} + +static inline void _debug_uart_putc(int ch) +{ + struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; + + while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) + ; + serial_dout(&com_port->thr, ch); +} + +DEBUG_UART_FUNCS + +#endif + +#ifdef CONFIG_DEBUG_UART_OMAP + +#include + +static inline void _debug_uart_init(void) +{ + struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; + int baud_divisor; + + baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, + CONFIG_BAUDRATE); serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); + serial_dout(&com_port->mdr1, 0x7); serial_dout(&com_port->mcr, UART_MCRVAL); - serial_dout(&com_port->fcr, UART_FCRVAL); + serial_dout(&com_port->fcr, UART_FCR_DEFVAL); serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); serial_dout(&com_port->dll, baud_divisor & 0xff); serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); serial_dout(&com_port->lcr, UART_LCRVAL); + serial_dout(&com_port->mdr1, 0x0); } static inline void _debug_uart_putc(int ch) @@ -361,10 +379,20 @@ int ns16550_serial_probe(struct udevice *dev) } #if CONFIG_IS_ENABLED(OF_CONTROL) +enum { + PORT_NS16550 = 0, + PORT_JZ4780, +}; +#endif + +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) int ns16550_serial_ofdata_to_platdata(struct udevice *dev) { struct ns16550_platdata *plat = dev->platdata; + const u32 port_type = dev_get_driver_data(dev); fdt_addr_t addr; + struct clk clk; + int err; /* try Processor Local Bus device first */ addr = dev_get_addr(dev); @@ -376,13 +404,13 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) int ret; /* we prefer to use a memory-mapped register */ - ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset, + ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev), FDT_PCI_SPACE_MEM32, "reg", &pci_addr); if (ret) { /* try if there is any i/o-mapped register */ ret = fdtdec_get_pci_addr(gd->fdt_blob, - dev->of_offset, + dev_of_offset(dev), FDT_PCI_SPACE_IO, "reg", &pci_addr); if (ret) @@ -400,17 +428,40 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) if (addr == FDT_ADDR_T_NONE) return -EINVAL; +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED plat->base = addr; - plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset, +#else + plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE); +#endif + + plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), + "reg-offset", 0); + plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "reg-shift", 0); - plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, - "clock-frequency", - CONFIG_SYS_NS16550_CLK); + + err = clk_get_by_index(dev, 0, &clk); + if (!err) { + err = clk_get_rate(&clk); + if (!IS_ERR_VALUE(err)) + plat->clock = err; + } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { + debug("ns16550 failed to get clock\n"); + return err; + } + + if (!plat->clock) + plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), + "clock-frequency", + CONFIG_SYS_NS16550_CLK); if (!plat->clock) { debug("ns16550 clock not defined\n"); return -EINVAL; } + plat->fcr = UART_FCR_DEFVAL; + if (port_type == PORT_JZ4780) + plat->fcr |= UART_FCR_UME; + return 0; } #endif @@ -422,32 +473,36 @@ const struct dm_serial_ops ns16550_serial_ops = { .setbrg = ns16550_serial_setbrg, }; -#if CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) /* * Please consider existing compatible strings before adding a new * one to keep this table compact. Or you may add a generic "ns16550" * compatible string to your dts. */ static const struct udevice_id ns16550_serial_ids[] = { - { .compatible = "ns16550" }, - { .compatible = "ns16550a" }, - { .compatible = "nvidia,tegra20-uart" }, - { .compatible = "snps,dw-apb-uart" }, - { .compatible = "ti,omap2-uart" }, - { .compatible = "ti,omap3-uart" }, - { .compatible = "ti,omap4-uart" }, - { .compatible = "ti,am3352-uart" }, - { .compatible = "ti,am4372-uart" }, - { .compatible = "ti,dra742-uart" }, + { .compatible = "ns16550", .data = PORT_NS16550 }, + { .compatible = "ns16550a", .data = PORT_NS16550 }, + { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, + { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, + { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, + { .compatible = "ti,omap2-uart", .data = PORT_NS16550 }, + { .compatible = "ti,omap3-uart", .data = PORT_NS16550 }, + { .compatible = "ti,omap4-uart", .data = PORT_NS16550 }, + { .compatible = "ti,am3352-uart", .data = PORT_NS16550 }, + { .compatible = "ti,am4372-uart", .data = PORT_NS16550 }, + { .compatible = "ti,dra742-uart", .data = PORT_NS16550 }, {} }; -#endif +#endif /* OF_CONTROL && !OF_PLATDATA */ #if CONFIG_IS_ENABLED(SERIAL_PRESENT) + +/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */ +#if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL) U_BOOT_DRIVER(ns16550_serial) = { .name = "ns16550_serial", .id = UCLASS_SERIAL, -#if CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = ns16550_serial_ids, .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), @@ -458,4 +513,6 @@ U_BOOT_DRIVER(ns16550_serial) = { .flags = DM_FLAG_PRE_RELOC, }; #endif +#endif /* SERIAL_PRESENT */ + #endif /* CONFIG_DM_SERIAL */