X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fpic32_eth.c;h=3458440b6ff7ff59924cc7a0d36b6f6063131d1a;hb=1eb69ae498567bb0b62ee554647204e8245cdacc;hp=167af8bde5b2770bd2638ff2ee2361580271bf91;hpb=23e7578c9b17a5af8804ee2df8e52b9324651b6d;p=oweals%2Fu-boot.git

diff --git a/drivers/net/pic32_eth.c b/drivers/net/pic32_eth.c
index 167af8bde5..3458440b6f 100644
--- a/drivers/net/pic32_eth.c
+++ b/drivers/net/pic32_eth.c
@@ -1,17 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (c) 2015 Purna Chandra Mandal <purna.mandal@microchip.com>
  *
- * SPDX-License-Identifier:	GPL-2.0+
- *
  */
 #include <common.h>
+#include <cpu_func.h>
 #include <errno.h>
 #include <dm.h>
 #include <net.h>
 #include <miiphy.h>
 #include <console.h>
+#include <time.h>
 #include <wait_bit.h>
 #include <asm/gpio.h>
+#include <linux/mii.h>
 
 #include "pic32_eth.h"
 
@@ -64,8 +66,8 @@ static int pic32_mii_init(struct pic32eth_dev *priv)
 	writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr);
 
 	/* wait till busy */
-	wait_for_bit(__func__, &ectl_p->stat.raw, ETHSTAT_BUSY, false,
-		     CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(&ectl_p->stat.raw, ETHSTAT_BUSY, false,
+			  CONFIG_SYS_HZ, false);
 
 	/* turn controller ON to access PHY over MII */
 	writel(ETHCON_ON, &ectl_p->con1.set);
@@ -239,8 +241,8 @@ static void pic32_ctrl_reset(struct pic32eth_dev *priv)
 	writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr);
 
 	/* wait till busy */
-	wait_for_bit(__func__, &ectl_p->stat.raw, ETHSTAT_BUSY, false,
-		     CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(&ectl_p->stat.raw, ETHSTAT_BUSY, false,
+			  CONFIG_SYS_HZ, false);
 	/* decrement received buffcnt to zero. */
 	while (readl(&ectl_p->stat.raw) & ETHSTAT_BUFCNT)
 		writel(ETHCON_BUFCDEC, &ectl_p->con1.set);
@@ -375,8 +377,8 @@ static void pic32_eth_stop(struct udevice *dev)
 	mdelay(10);
 
 	/* wait until everything is down */
-	wait_for_bit(__func__, &ectl_p->stat.raw, ETHSTAT_BUSY, false,
-		     2 * CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(&ectl_p->stat.raw, ETHSTAT_BUSY, false,
+			  2 * CONFIG_SYS_HZ, false);
 
 	/* clear any existing interrupt event */
 	writel(0xffffffff, &ectl_p->irq.clr);
@@ -535,7 +537,8 @@ static int pic32_eth_probe(struct udevice *dev)
 	int offset = 0;
 	int phy_addr = -1;
 
-	addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size);
+	addr = fdtdec_get_addr_size(gd->fdt_blob, dev_of_offset(dev), "reg",
+				    &size);
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
@@ -544,7 +547,8 @@ static int pic32_eth_probe(struct udevice *dev)
 
 	/* get phy mode */
 	pdata->phy_interface = -1;
-	phy_mode = fdt_getprop(gd->fdt_blob, dev->of_offset, "phy-mode", NULL);
+	phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
+			       NULL);
 	if (phy_mode)
 		pdata->phy_interface = phy_get_interface_by_name(phy_mode);
 	if (pdata->phy_interface == -1) {
@@ -553,14 +557,13 @@ static int pic32_eth_probe(struct udevice *dev)
 	}
 
 	/* get phy addr */
-	offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset,
+	offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
 				       "phy-handle");
 	if (offset > 0)
 		phy_addr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1);
 
 	/* phy reset gpio */
-	gpio_request_by_name_nodev(gd->fdt_blob, dev->of_offset,
-				   "reset-gpios", 0,
+	gpio_request_by_name_nodev(dev_ofnode(dev), "reset-gpios", 0,
 				   &priv->rst_gpio, GPIOD_IS_OUT);
 
 	priv->phyif	= pdata->phy_interface;