X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fks8851_mll.c;h=3ff173ad3391c7ff9a32873d0765761c8b59b356;hb=d5ce2631000be075f3243d1117468cf72d7f43a5;hp=5b4c5b0df6d55417ba9594ddc84bb9f7b24c56ba;hpb=b939689c7b87773c44275a578ffc8674a867e39d;p=oweals%2Fu-boot.git diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c index 5b4c5b0df6..3ff173ad33 100644 --- a/drivers/net/ks8851_mll.c +++ b/drivers/net/ks8851_mll.c @@ -1,138 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Micrel KS8851_MLL 16bit Network driver * Copyright (c) 2011 Roberto Cerati - * - * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include #include #include #include +#include #include "ks8851_mll.h" #define DRIVERNAME "ks8851_mll" -#define MAX_RECV_FRAMES 32 -#define MAX_BUF_SIZE 2048 -#define TX_BUF_SIZE 2000 #define RX_BUF_SIZE 2000 -static const struct chip_id chip_ids[] = { - {CIDER_ID, "KSZ8851"}, - {0, NULL}, -}; - -/* - * union ks_tx_hdr - tx header data - * @txb: The header as bytes - * @txw: The header as 16bit, little-endian words - * - * A dual representation of the tx header data to allow - * access to individual bytes, and to allow 16bit accesses - * with 16bit alignment. - */ -union ks_tx_hdr { - u8 txb[4]; - __le16 txw[2]; -}; - /* * struct ks_net - KS8851 driver private data - * @net_device : The network device we're bound to - * @txh : temporaly buffer to save status/length. - * @frame_head_info : frame header information for multi-pkt rx. - * @statelock : Lock on this structure for tx list. - * @msg_enable : The message flags controlling driver output (see ethtool). - * @frame_cnt : number of frames received. + * @dev : legacy non-DM ethernet device structure + * @iobase : register base * @bus_width : i/o bus width. - * @irq : irq number assigned to this device. - * @rc_rxqcr : Cached copy of KS_RXQCR. - * @rc_txcr : Cached copy of KS_TXCR. - * @rc_ier : Cached copy of KS_IER. * @sharedbus : Multipex(addr and data bus) mode indicator. - * @cmd_reg_cache : command register cached. - * @cmd_reg_cache_int : command register cached. Used in the irq handler. - * @promiscuous : promiscuous mode indicator. - * @all_mcast : mutlicast indicator. - * @mcast_lst_size : size of multicast list. - * @mcast_lst : multicast list. - * @mcast_bits : multicast enabed. - * @mac_addr : MAC address assigned to this device. - * @fid : frame id. - * @extra_byte : number of extra byte prepended rx pkt. - * @enabled : indicator this device works. + * @extra_byte : number of extra byte prepended rx pkt. */ - -/* Receive multiplex framer header info */ -struct type_frame_head { - u16 sts; /* Frame status */ - u16 len; /* Byte count */ -} fr_h_i[MAX_RECV_FRAMES]; - struct ks_net { - struct net_device *netdev; - union ks_tx_hdr txh; - struct type_frame_head *frame_head_info; - u32 msg_enable; - u32 frame_cnt; +#ifndef CONFIG_DM_ETH + struct eth_device dev; +#endif + phys_addr_t iobase; int bus_width; - int irq; - u16 rc_rxqcr; - u16 rc_txcr; - u16 rc_ier; u16 sharedbus; - u16 cmd_reg_cache; - u16 cmd_reg_cache_int; - u16 promiscuous; - u16 all_mcast; - u16 mcast_lst_size; - u8 mcast_lst[MAX_MCAST_LST][MAC_ADDR_LEN]; - u8 mcast_bits[HW_MCAST_SIZE]; - u8 mac_addr[6]; - u8 fid; + u16 rxfc; u8 extra_byte; - u8 enabled; -} ks_str, *ks; +}; #define BE3 0x8000 /* Byte Enable 3 */ #define BE2 0x4000 /* Byte Enable 2 */ #define BE1 0x2000 /* Byte Enable 1 */ #define BE0 0x1000 /* Byte Enable 0 */ -static u8 ks_rdreg8(struct eth_device *dev, u16 offset) +static u8 ks_rdreg8(struct ks_net *ks, u16 offset) { u8 shift_bit = offset & 0x03; u8 shift_data = (offset & 1) << 3; - writew(offset | (BE0 << shift_bit), dev->iobase + 2); - - return (u8)(readw(dev->iobase) >> shift_data); -} - -static u16 ks_rdreg16(struct eth_device *dev, u16 offset) -{ - writew(offset | ((BE1 | BE0) << (offset & 0x02)), dev->iobase + 2); + writew(offset | (BE0 << shift_bit), ks->iobase + 2); - return readw(dev->iobase); + return (u8)(readw(ks->iobase) >> shift_data); } -static void ks_wrreg8(struct eth_device *dev, u16 offset, u8 val) +static u16 ks_rdreg16(struct ks_net *ks, u16 offset) { - u8 shift_bit = (offset & 0x03); - u16 value_write = (u16)(val << ((offset & 1) << 3)); + writew(offset | ((BE1 | BE0) << (offset & 0x02)), ks->iobase + 2); - writew(offset | (BE0 << shift_bit), dev->iobase + 2); - writew(value_write, dev->iobase); + return readw(ks->iobase); } -static void ks_wrreg16(struct eth_device *dev, u16 offset, u16 val) +static void ks_wrreg16(struct ks_net *ks, u16 offset, u16 val) { - writew(offset | ((BE1 | BE0) << (offset & 0x02)), dev->iobase + 2); - writew(val, dev->iobase); + writew(offset | ((BE1 | BE0) << (offset & 0x02)), ks->iobase + 2); + writew(val, ks->iobase); } /* @@ -142,12 +73,12 @@ static void ks_wrreg16(struct eth_device *dev, u16 offset, u16 val) * @wptr: buffer address to save data * @len: length in byte to read */ -static inline void ks_inblk(struct eth_device *dev, u16 *wptr, u32 len) +static inline void ks_inblk(struct ks_net *ks, u16 *wptr, u32 len) { len >>= 1; while (len--) - *wptr++ = readw(dev->iobase); + *wptr++ = readw(ks->iobase); } /* @@ -156,42 +87,42 @@ static inline void ks_inblk(struct eth_device *dev, u16 *wptr, u32 len) * @wptr: buffer address * @len: length in byte to write */ -static inline void ks_outblk(struct eth_device *dev, u16 *wptr, u32 len) +static inline void ks_outblk(struct ks_net *ks, u16 *wptr, u32 len) { len >>= 1; while (len--) - writew(*wptr++, dev->iobase); + writew(*wptr++, ks->iobase); } -static void ks_enable_int(struct eth_device *dev) +static void ks_enable_int(struct ks_net *ks) { - ks_wrreg16(dev, KS_IER, ks->rc_ier); + ks_wrreg16(ks, KS_IER, IRQ_LCI | IRQ_TXI | IRQ_RXI); } -static void ks_set_powermode(struct eth_device *dev, unsigned pwrmode) +static void ks_set_powermode(struct ks_net *ks, unsigned int pwrmode) { - unsigned pmecr; + unsigned int pmecr; - ks_rdreg16(dev, KS_GRR); - pmecr = ks_rdreg16(dev, KS_PMECR); + ks_rdreg16(ks, KS_GRR); + pmecr = ks_rdreg16(ks, KS_PMECR); pmecr &= ~PMECR_PM_MASK; pmecr |= pwrmode; - ks_wrreg16(dev, KS_PMECR, pmecr); + ks_wrreg16(ks, KS_PMECR, pmecr); } /* * ks_read_config - read chip configuration of bus width. * @ks: The chip information */ -static void ks_read_config(struct eth_device *dev) +static void ks_read_config(struct ks_net *ks) { u16 reg_data = 0; /* Regardless of bus width, 8 bit read should always work. */ - reg_data = ks_rdreg8(dev, KS_CCR) & 0x00FF; - reg_data |= ks_rdreg8(dev, KS_CCR + 1) << 8; + reg_data = ks_rdreg8(ks, KS_CCR) & 0x00FF; + reg_data |= ks_rdreg8(ks, KS_CCR + 1) << 8; /* addr/data bus are multiplexed */ ks->sharedbus = (reg_data & CCR_SHARED) == CCR_SHARED; @@ -225,58 +156,58 @@ static void ks_read_config(struct eth_device *dev) * not currently specify the exact sequence, we have chosen something * that seems to work with our device. */ -static void ks_soft_reset(struct eth_device *dev, unsigned op) +static void ks_soft_reset(struct ks_net *ks, unsigned int op) { /* Disable interrupt first */ - ks_wrreg16(dev, KS_IER, 0x0000); - ks_wrreg16(dev, KS_GRR, op); + ks_wrreg16(ks, KS_IER, 0x0000); + ks_wrreg16(ks, KS_GRR, op); mdelay(10); /* wait a short time to effect reset */ - ks_wrreg16(dev, KS_GRR, 0); + ks_wrreg16(ks, KS_GRR, 0); mdelay(1); /* wait for condition to clear */ } -void ks_enable_qmu(struct eth_device *dev) +void ks_enable_qmu(struct ks_net *ks) { u16 w; - w = ks_rdreg16(dev, KS_TXCR); + w = ks_rdreg16(ks, KS_TXCR); /* Enables QMU Transmit (TXCR). */ - ks_wrreg16(dev, KS_TXCR, w | TXCR_TXE); + ks_wrreg16(ks, KS_TXCR, w | TXCR_TXE); /* Enable RX Frame Count Threshold and Auto-Dequeue RXQ Frame */ - w = ks_rdreg16(dev, KS_RXQCR); - ks_wrreg16(dev, KS_RXQCR, w | RXQCR_RXFCTE); + w = ks_rdreg16(ks, KS_RXQCR); + ks_wrreg16(ks, KS_RXQCR, w | RXQCR_RXFCTE); /* Enables QMU Receive (RXCR1). */ - w = ks_rdreg16(dev, KS_RXCR1); - ks_wrreg16(dev, KS_RXCR1, w | RXCR1_RXE); + w = ks_rdreg16(ks, KS_RXCR1); + ks_wrreg16(ks, KS_RXCR1, w | RXCR1_RXE); } -static void ks_disable_qmu(struct eth_device *dev) +static void ks_disable_qmu(struct ks_net *ks) { u16 w; - w = ks_rdreg16(dev, KS_TXCR); + w = ks_rdreg16(ks, KS_TXCR); /* Disables QMU Transmit (TXCR). */ w &= ~TXCR_TXE; - ks_wrreg16(dev, KS_TXCR, w); + ks_wrreg16(ks, KS_TXCR, w); /* Disables QMU Receive (RXCR1). */ - w = ks_rdreg16(dev, KS_RXCR1); + w = ks_rdreg16(ks, KS_RXCR1); w &= ~RXCR1_RXE; - ks_wrreg16(dev, KS_RXCR1, w); + ks_wrreg16(ks, KS_RXCR1, w); } -static inline void ks_read_qmu(struct eth_device *dev, u16 *buf, u32 len) +static inline void ks_read_qmu(struct ks_net *ks, u16 *buf, u32 len) { u32 r = ks->extra_byte & 0x1; u32 w = ks->extra_byte - r; /* 1. set sudo DMA mode */ - ks_wrreg16(dev, KS_RXFDPR, RXFDPR_RXFPAI); - ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr | RXQCR_SDA) & 0xff); + ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI); + ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_SDA); /* * 2. read prepend data @@ -286,50 +217,42 @@ static inline void ks_read_qmu(struct eth_device *dev, u16 *buf, u32 len) */ if (r) - ks_rdreg8(dev, 0); + ks_rdreg8(ks, 0); - ks_inblk(dev, buf, w + 2 + 2); + ks_inblk(ks, buf, w + 2 + 2); /* 3. read pkt data */ - ks_inblk(dev, buf, ALIGN(len, 4)); + ks_inblk(ks, buf, ALIGN(len, 4)); /* 4. reset sudo DMA Mode */ - ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr & ~RXQCR_SDA) & 0xff); + ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL); } -static void ks_rcv(struct eth_device *dev, uchar **pv_data) +static int ks_rcv(struct ks_net *ks, uchar *data) { - struct type_frame_head *frame_hdr = ks->frame_head_info; - int i; + u16 sts, len; - ks->frame_cnt = ks_rdreg16(dev, KS_RXFCTR) >> 8; + if (!ks->rxfc) + ks->rxfc = ks_rdreg16(ks, KS_RXFCTR) >> 8; - /* read all header information */ - for (i = 0; i < ks->frame_cnt; i++) { - /* Checking Received packet status */ - frame_hdr->sts = ks_rdreg16(dev, KS_RXFHSR); - /* Get packet len from hardware */ - frame_hdr->len = ks_rdreg16(dev, KS_RXFHBCR); - frame_hdr++; - } + if (!ks->rxfc) + return 0; + + /* Checking Received packet status */ + sts = ks_rdreg16(ks, KS_RXFHSR); + /* Get packet len from hardware */ + len = ks_rdreg16(ks, KS_RXFHBCR); - frame_hdr = ks->frame_head_info; - while (ks->frame_cnt--) { - if ((frame_hdr->sts & RXFSHR_RXFV) && - (frame_hdr->len < RX_BUF_SIZE) && - frame_hdr->len) { - /* read data block including CRC 4 bytes */ - ks_read_qmu(dev, (u16 *)(*pv_data), frame_hdr->len); - - /* net_rx_packets buffer size is ok (*pv_data) */ - net_process_received_packet(*pv_data, frame_hdr->len); - pv_data++; - } else { - ks_wrreg16(dev, KS_RXQCR, (ks->rc_rxqcr | RXQCR_RRXEF)); - printf(DRIVERNAME ": bad packet\n"); - } - frame_hdr++; + if ((sts & RXFSHR_RXFV) && len && (len < RX_BUF_SIZE)) { + /* read data block including CRC 4 bytes */ + ks_read_qmu(ks, (u16 *)data, len); + ks->rxfc--; + return len - 4; } + + ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_RRXEF); + printf(DRIVERNAME ": bad packet\n"); + return 0; } /* @@ -338,13 +261,13 @@ static void ks_rcv(struct eth_device *dev, uchar **pv_data) * * Read and check the TX/RX memory selftest information. */ -static int ks_read_selftest(struct eth_device *dev) +static int ks_read_selftest(struct ks_net *ks) { u16 both_done = MBIR_TXMBF | MBIR_RXMBF; u16 mbir; int ret = 0; - mbir = ks_rdreg16(dev, KS_MBIR); + mbir = ks_rdreg16(ks, KS_MBIR); if ((mbir & both_done) != both_done) { printf(DRIVERNAME ": Memory selftest not finished\n"); @@ -366,61 +289,55 @@ static int ks_read_selftest(struct eth_device *dev) return ret; } -static void ks_setup(struct eth_device *dev) +static void ks_setup(struct ks_net *ks) { u16 w; /* Setup Transmit Frame Data Pointer Auto-Increment (TXFDPR) */ - ks_wrreg16(dev, KS_TXFDPR, TXFDPR_TXFPAI); + ks_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI); /* Setup Receive Frame Data Pointer Auto-Increment */ - ks_wrreg16(dev, KS_RXFDPR, RXFDPR_RXFPAI); + ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI); /* Setup Receive Frame Threshold - 1 frame (RXFCTFC) */ - ks_wrreg16(dev, KS_RXFCTR, 1 & RXFCTR_THRESHOLD_MASK); + ks_wrreg16(ks, KS_RXFCTR, 1 & RXFCTR_THRESHOLD_MASK); /* Setup RxQ Command Control (RXQCR) */ - ks->rc_rxqcr = RXQCR_CMD_CNTL; - ks_wrreg16(dev, KS_RXQCR, ks->rc_rxqcr); + ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL); /* * set the force mode to half duplex, default is full duplex * because if the auto-negotiation fails, most switch uses * half-duplex. */ - w = ks_rdreg16(dev, KS_P1MBCR); + w = ks_rdreg16(ks, KS_P1MBCR); w &= ~P1MBCR_FORCE_FDX; - ks_wrreg16(dev, KS_P1MBCR, w); + ks_wrreg16(ks, KS_P1MBCR, w); w = TXCR_TXFCE | TXCR_TXPE | TXCR_TXCRC | TXCR_TCGIP; - ks_wrreg16(dev, KS_TXCR, w); + ks_wrreg16(ks, KS_TXCR, w); w = RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXIPFCC; /* Normal mode */ w |= RXCR1_RXPAFMA; - ks_wrreg16(dev, KS_RXCR1, w); + ks_wrreg16(ks, KS_RXCR1, w); } -static void ks_setup_int(struct eth_device *dev) +static void ks_setup_int(struct ks_net *ks) { - ks->rc_ier = 0x00; - /* Clear the interrupts status of the hardware. */ - ks_wrreg16(dev, KS_ISR, 0xffff); - - /* Enables the interrupts of the hardware. */ - ks->rc_ier = (IRQ_LCI | IRQ_TXI | IRQ_RXI); + ks_wrreg16(ks, KS_ISR, 0xffff); } -static int ks8851_mll_detect_chip(struct eth_device *dev) +static int ks8851_mll_detect_chip(struct ks_net *ks) { - unsigned short val, i; + unsigned short val; - ks_read_config(dev); + ks_read_config(ks); - val = ks_rdreg16(dev, KS_CIDER); + val = ks_rdreg16(ks, KS_CIDER); if (val == 0xffff) { /* Special case -- no chip present */ @@ -433,107 +350,95 @@ static int ks8851_mll_detect_chip(struct eth_device *dev) debug("Read back KS8851 id 0x%x\n", val); - /* only one entry in the table */ - val &= 0xfff0; - for (i = 0; chip_ids[i].id != 0; i++) { - if (chip_ids[i].id == val) - break; - } - if (!chip_ids[i].id) { + if ((val & 0xfff0) != CIDER_ID) { printf(DRIVERNAME ": Unknown chip ID %04x\n", val); return -1; } - dev->priv = (void *)&chip_ids[i]; - return 0; } -static void ks8851_mll_reset(struct eth_device *dev) +static void ks8851_mll_reset(struct ks_net *ks) { /* wake up powermode to normal mode */ - ks_set_powermode(dev, PMECR_PM_NORMAL); + ks_set_powermode(ks, PMECR_PM_NORMAL); mdelay(1); /* wait for normal mode to take effect */ /* Disable interrupt and reset */ - ks_soft_reset(dev, GRR_GSR); + ks_soft_reset(ks, GRR_GSR); /* turn off the IRQs and ack any outstanding */ - ks_wrreg16(dev, KS_IER, 0x0000); - ks_wrreg16(dev, KS_ISR, 0xffff); + ks_wrreg16(ks, KS_IER, 0x0000); + ks_wrreg16(ks, KS_ISR, 0xffff); /* shutdown RX/TX QMU */ - ks_disable_qmu(dev); + ks_disable_qmu(ks); } -static void ks8851_mll_phy_configure(struct eth_device *dev) +static void ks8851_mll_phy_configure(struct ks_net *ks) { u16 data; - ks_setup(dev); - ks_setup_int(dev); + ks_setup(ks); + ks_setup_int(ks); /* Probing the phy */ - data = ks_rdreg16(dev, KS_OBCR); - ks_wrreg16(dev, KS_OBCR, data | OBCR_ODS_16MA); + data = ks_rdreg16(ks, KS_OBCR); + ks_wrreg16(ks, KS_OBCR, data | OBCR_ODS_16MA); debug(DRIVERNAME ": phy initialized\n"); } -static void ks8851_mll_enable(struct eth_device *dev) +static void ks8851_mll_enable(struct ks_net *ks) { - ks_wrreg16(dev, KS_ISR, 0xffff); - ks_enable_int(dev); - ks_enable_qmu(dev); + ks_wrreg16(ks, KS_ISR, 0xffff); + ks_enable_int(ks); + ks_enable_qmu(ks); } -static int ks8851_mll_init(struct eth_device *dev, bd_t *bd) +static int ks8851_mll_init_common(struct ks_net *ks) { - struct chip_id *id = dev->priv; - - debug(DRIVERNAME ": detected %s controller\n", id->name); - - if (ks_read_selftest(dev)) { + if (ks_read_selftest(ks)) { printf(DRIVERNAME ": Selftest failed\n"); return -1; } - ks8851_mll_reset(dev); + ks8851_mll_reset(ks); /* Configure the PHY, initialize the link state */ - ks8851_mll_phy_configure(dev); + ks8851_mll_phy_configure(ks); - /* static allocation of private informations */ - ks->frame_head_info = fr_h_i; + ks->rxfc = 0; /* Turn on Tx + Rx */ - ks8851_mll_enable(dev); + ks8851_mll_enable(ks); return 0; } -static void ks_write_qmu(struct eth_device *dev, u8 *pdata, u16 len) +static void ks_write_qmu(struct ks_net *ks, u8 *pdata, u16 len) { + __le16 txw[2]; /* start header at txb[0] to align txw entries */ - ks->txh.txw[0] = 0; - ks->txh.txw[1] = cpu_to_le16(len); + txw[0] = 0; + txw[1] = cpu_to_le16(len); /* 1. set sudo-DMA mode */ - ks_wrreg16(dev, KS_TXFDPR, TXFDPR_TXFPAI); - ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr | RXQCR_SDA) & 0xff); - /* 2. write status/lenth info */ - ks_outblk(dev, ks->txh.txw, 4); + ks_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI); + ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_SDA); + /* 2. write status/length info */ + ks_outblk(ks, txw, 4); /* 3. write pkt data */ - ks_outblk(dev, (u16 *)pdata, ALIGN(len, 4)); + ks_outblk(ks, (u16 *)pdata, ALIGN(len, 4)); /* 4. reset sudo-DMA mode */ - ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr & ~RXQCR_SDA) & 0xff); + ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL); /* 5. Enqueue Tx(move the pkt from TX buffer into TXQ) */ - ks_wrreg16(dev, KS_TXQCR, TXQCR_METFE); + ks_wrreg16(ks, KS_TXQCR, TXQCR_METFE); /* 6. wait until TXQCR_METFE is auto-cleared */ - do { } while (ks_rdreg16(dev, KS_TXQCR) & TXQCR_METFE); + do { } while (ks_rdreg16(ks, KS_TXQCR) & TXQCR_METFE); } -static int ks8851_mll_send(struct eth_device *dev, void *packet, int length) +static int ks8851_mll_send_common(struct ks_net *ks, void *packet, int length) { u8 *data = (u8 *)packet; u16 tmplen = (u16)length; @@ -543,19 +448,19 @@ static int ks8851_mll_send(struct eth_device *dev, void *packet, int length) * Extra space are required: * 4 byte for alignment, 4 for status/length, 4 for CRC */ - retv = ks_rdreg16(dev, KS_TXMIR) & 0x1fff; + retv = ks_rdreg16(ks, KS_TXMIR) & 0x1fff; if (retv >= tmplen + 12) { - ks_write_qmu(dev, data, tmplen); + ks_write_qmu(ks, data, tmplen); return 0; - } else { - printf(DRIVERNAME ": failed to send packet: No buffer\n"); - return -1; } + + printf(DRIVERNAME ": failed to send packet: No buffer\n"); + return -1; } -static void ks8851_mll_halt(struct eth_device *dev) +static void ks8851_mll_halt_common(struct ks_net *ks) { - ks8851_mll_reset(dev); + ks8851_mll_reset(ks); } /* @@ -564,70 +469,208 @@ static void ks8851_mll_halt(struct eth_device *dev) * needs to be enough to prevent a packet being discarded while * we are processing the previous one. */ -static int ks8851_mll_recv(struct eth_device *dev) +static int ks8851_mll_recv_common(struct ks_net *ks, uchar *data) { u16 status; + int ret = 0; + + status = ks_rdreg16(ks, KS_ISR); - status = ks_rdreg16(dev, KS_ISR); + ks_wrreg16(ks, KS_ISR, status); - ks_wrreg16(dev, KS_ISR, status); + if (ks->rxfc || (status & IRQ_RXI)) + ret = ks_rcv(ks, data); - if ((status & IRQ_RXI)) - ks_rcv(dev, (uchar **)net_rx_packets); + if (status & IRQ_LDI) { + u16 pmecr = ks_rdreg16(ks, KS_PMECR); - if ((status & IRQ_LDI)) { - u16 pmecr = ks_rdreg16(dev, KS_PMECR); pmecr &= ~PMECR_WKEVT_MASK; - ks_wrreg16(dev, KS_PMECR, pmecr | PMECR_WKEVT_LINK); + ks_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK); } - return 0; + return ret; } -static int ks8851_mll_write_hwaddr(struct eth_device *dev) +static void ks8851_mll_write_hwaddr_common(struct ks_net *ks, u8 enetaddr[6]) { u16 addrl, addrm, addrh; - addrh = (dev->enetaddr[0] << 8) | dev->enetaddr[1]; - addrm = (dev->enetaddr[2] << 8) | dev->enetaddr[3]; - addrl = (dev->enetaddr[4] << 8) | dev->enetaddr[5]; + addrh = (enetaddr[0] << 8) | enetaddr[1]; + addrm = (enetaddr[2] << 8) | enetaddr[3]; + addrl = (enetaddr[4] << 8) | enetaddr[5]; + + ks_wrreg16(ks, KS_MARH, addrh); + ks_wrreg16(ks, KS_MARM, addrm); + ks_wrreg16(ks, KS_MARL, addrl); +} + +#ifndef CONFIG_DM_ETH +static int ks8851_mll_init(struct eth_device *dev, bd_t *bd) +{ + struct ks_net *ks = container_of(dev, struct ks_net, dev); + + return ks8851_mll_init_common(ks); +} + +static void ks8851_mll_halt(struct eth_device *dev) +{ + struct ks_net *ks = container_of(dev, struct ks_net, dev); + + ks8851_mll_halt_common(ks); +} - ks_wrreg16(dev, KS_MARH, addrh); - ks_wrreg16(dev, KS_MARM, addrm); - ks_wrreg16(dev, KS_MARL, addrl); +static int ks8851_mll_send(struct eth_device *dev, void *packet, int length) +{ + struct ks_net *ks = container_of(dev, struct ks_net, dev); + + return ks8851_mll_send_common(ks, packet, length); +} + +static int ks8851_mll_recv(struct eth_device *dev) +{ + struct ks_net *ks = container_of(dev, struct ks_net, dev); + int ret; + + ret = ks8851_mll_recv_common(ks, net_rx_packets[0]); + if (ret) + net_process_received_packet(net_rx_packets[0], ret); + + return ret; +} + +static int ks8851_mll_write_hwaddr(struct eth_device *dev) +{ + struct ks_net *ks = container_of(dev, struct ks_net, dev); + + ks8851_mll_write_hwaddr_common(ks, ks->dev.enetaddr); return 0; } int ks8851_mll_initialize(u8 dev_num, int base_addr) { - struct eth_device *dev; + struct ks_net *ks; + + ks = calloc(1, sizeof(*ks)); + if (!ks) + return -ENOMEM; + + ks->iobase = base_addr; - dev = malloc(sizeof(*dev)); - if (!dev) { - printf("Error: Failed to allocate memory\n"); + /* Try to detect chip. Will fail if not present. */ + if (ks8851_mll_detect_chip(ks)) { + free(ks); return -1; } - memset(dev, 0, sizeof(*dev)); - dev->iobase = base_addr; + ks->dev.init = ks8851_mll_init; + ks->dev.halt = ks8851_mll_halt; + ks->dev.send = ks8851_mll_send; + ks->dev.recv = ks8851_mll_recv; + ks->dev.write_hwaddr = ks8851_mll_write_hwaddr; + sprintf(ks->dev.name, "%s-%hu", DRIVERNAME, dev_num); + + eth_register(&ks->dev); + + return 0; +} +#else /* ifdef CONFIG_DM_ETH */ +static int ks8851_start(struct udevice *dev) +{ + struct ks_net *ks = dev_get_priv(dev); + + return ks8851_mll_init_common(ks); +} + +static void ks8851_stop(struct udevice *dev) +{ + struct ks_net *ks = dev_get_priv(dev); - ks = &ks_str; + ks8851_mll_halt_common(ks); +} + +static int ks8851_send(struct udevice *dev, void *packet, int length) +{ + struct ks_net *ks = dev_get_priv(dev); + int ret; + + ret = ks8851_mll_send_common(ks, packet, length); + + return ret ? 0 : -ETIMEDOUT; +} + +static int ks8851_recv(struct udevice *dev, int flags, uchar **packetp) +{ + struct ks_net *ks = dev_get_priv(dev); + uchar *data = net_rx_packets[0]; + int ret; + + ret = ks8851_mll_recv_common(ks, data); + if (ret) + *packetp = (void *)data; + + return ret ? ret : -EAGAIN; +} + +static int ks8851_write_hwaddr(struct udevice *dev) +{ + struct ks_net *ks = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_platdata(dev); + + ks8851_mll_write_hwaddr_common(ks, pdata->enetaddr); + + return 0; +} + +static int ks8851_bind(struct udevice *dev) +{ + return device_set_name(dev, dev->name); +} + +static int ks8851_probe(struct udevice *dev) +{ + struct ks_net *ks = dev_get_priv(dev); /* Try to detect chip. Will fail if not present. */ - if (ks8851_mll_detect_chip(dev)) { - free(dev); - return -1; - } + ks8851_mll_detect_chip(ks); - dev->init = ks8851_mll_init; - dev->halt = ks8851_mll_halt; - dev->send = ks8851_mll_send; - dev->recv = ks8851_mll_recv; - dev->write_hwaddr = ks8851_mll_write_hwaddr; - sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num); + return 0; +} + +static int ks8851_ofdata_to_platdata(struct udevice *dev) +{ + struct ks_net *ks = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_platdata(dev); - eth_register(dev); + pdata->iobase = devfdt_get_addr(dev); + ks->iobase = pdata->iobase; return 0; } + +static const struct eth_ops ks8851_ops = { + .start = ks8851_start, + .stop = ks8851_stop, + .send = ks8851_send, + .recv = ks8851_recv, + .write_hwaddr = ks8851_write_hwaddr, +}; + +static const struct udevice_id ks8851_ids[] = { + { .compatible = "micrel,ks8851-mll" }, + { } +}; + +U_BOOT_DRIVER(ks8851) = { + .name = "eth_ks8851", + .id = UCLASS_ETH, + .of_match = ks8851_ids, + .bind = ks8851_bind, + .ofdata_to_platdata = ks8851_ofdata_to_platdata, + .probe = ks8851_probe, + .ops = &ks8851_ops, + .priv_auto_alloc_size = sizeof(struct ks_net), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; +#endif