X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fnet%2Farmada100_fec.c;h=da6662c7ee811dda80794fe7fe710b96da1f8c51;hb=9a32caf52d0dd8287d071eb6a0d93cacfea3fd17;hp=fbf97632c6df4707a05ab137454a2aa69d2c50f1;hpb=1fed668b3fb9c35932f58af00ff5539239fa4e1d;p=oweals%2Fu-boot.git diff --git a/drivers/net/armada100_fec.c b/drivers/net/armada100_fec.c index fbf97632c6..da6662c7ee 100644 --- a/drivers/net/armada100_fec.c +++ b/drivers/net/armada100_fec.c @@ -1,29 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2011 * eInfochips Ltd. - * Written-by: Ajay Bhargav + * Written-by: Ajay Bhargav * * (C) Copyright 2010 * Marvell Semiconductor * Contributor: Mahavir Jain - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA */ #include @@ -73,18 +56,19 @@ static int armdfec_phy_timeout(u32 *reg, u32 flag, int cond) return !timeout; } -static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg, - u16 *value) +static int smi_reg_read(struct mii_dev *bus, int phy_addr, int devad, + int phy_reg) { - struct eth_device *dev = eth_get_dev_by_name(devname); + u16 value = 0; + struct eth_device *dev = eth_get_dev_by_name(bus->name); struct armdfec_device *darmdfec = to_darmdfec(dev); struct armdfec_reg *regs = darmdfec->regs; u32 val; if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) { val = readl(®s->phyadr); - *value = val & 0x1f; - return 0; + value = val & 0x1f; + return value; } /* check parameters */ @@ -100,7 +84,7 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg, } /* wait for the SMI register to become available */ - if (armdfec_phy_timeout(®s->smi, SMI_BUSY, FALSE)) { + if (armdfec_phy_timeout(®s->smi, SMI_BUSY, false)) { printf("ARMD100 FEC: (%s) PHY busy timeout\n", __func__); return -1; } @@ -108,22 +92,22 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg, writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_R, ®s->smi); /* now wait for the data to be valid */ - if (armdfec_phy_timeout(®s->smi, SMI_R_VALID, TRUE)) { + if (armdfec_phy_timeout(®s->smi, SMI_R_VALID, true)) { val = readl(®s->smi); printf("ARMD100 FEC: (%s) PHY Read timeout, val=0x%x\n", __func__, val); return -1; } val = readl(®s->smi); - *value = val & 0xffff; + value = val & 0xffff; - return 0; + return value; } -static int smi_reg_write(const char *devname, - u8 phy_addr, u8 phy_reg, u16 value) +static int smi_reg_write(struct mii_dev *bus, int phy_addr, int devad, + int phy_reg, u16 value) { - struct eth_device *dev = eth_get_dev_by_name(devname); + struct eth_device *dev = eth_get_dev_by_name(bus->name); struct armdfec_device *darmdfec = to_darmdfec(dev); struct armdfec_reg *regs = darmdfec->regs; @@ -143,7 +127,7 @@ static int smi_reg_write(const char *devname, } /* wait for the SMI register to become available */ - if (armdfec_phy_timeout(®s->smi, SMI_BUSY, FALSE)) { + if (armdfec_phy_timeout(®s->smi, SMI_BUSY, false)) { printf("ARMD100 FEC: (%s) PHY busy timeout\n", __func__); return -1; } @@ -440,6 +424,7 @@ static int armdfec_init(struct eth_device *dev, bd_t *bd) struct armdfec_device *darmdfec = to_darmdfec(dev); struct armdfec_reg *regs = darmdfec->regs; int phy_adr; + u32 temp; armdfec_init_rx_desc_ring(darmdfec); @@ -479,9 +464,12 @@ static int armdfec_init(struct eth_device *dev, bd_t *bd) update_hash_table_mac_address(darmdfec, NULL, dev->enetaddr); /* Update TX and RX queue descriptor register */ - writel((u32)darmdfec->p_txdesc, ®s->txcdp[TXQ]); - writel((u32)darmdfec->p_rxdesc, ®s->rxfdp[RXQ]); - writel((u32)darmdfec->p_rxdesc_curr, ®s->rxcdp[RXQ]); + temp = (u32)®s->txcdp[TXQ]; + writel((u32)darmdfec->p_txdesc, temp); + temp = (u32)®s->rxfdp[RXQ]; + writel((u32)darmdfec->p_rxdesc, temp); + temp = (u32)®s->rxcdp[RXQ]; + writel((u32)darmdfec->p_rxdesc_curr, temp); /* Enable Interrupts */ writel(ALL_INTS, ®s->im); @@ -554,15 +542,14 @@ static void armdfec_halt(struct eth_device *dev) clrbits_le32(®s->pconf, PCR_EN); } -static int armdfec_send(struct eth_device *dev, volatile void *dataptr, - int datasize) +static int armdfec_send(struct eth_device *dev, void *dataptr, int datasize) { struct armdfec_device *darmdfec = to_darmdfec(dev); struct armdfec_reg *regs = darmdfec->regs; struct tx_desc *p_txdesc = darmdfec->p_txdesc; void *p = (void *)dataptr; int retry = PHY_WAIT_ITERATIONS * PHY_WAIT_MICRO_SECONDS; - u32 cmd_sts; + u32 cmd_sts, temp; /* Copy buffer if it's misaligned */ if ((u32)dataptr & 0x07) { @@ -583,7 +570,8 @@ static int armdfec_send(struct eth_device *dev, volatile void *dataptr, p_txdesc->byte_cnt = datasize; /* Apply send command using high priority TX queue */ - writel((u32)p_txdesc, ®s->txcdp[TXQ]); + temp = (u32)®s->txcdp[TXQ]; + writel((u32)p_txdesc, temp); writel(SDMA_CMD_TXDL | SDMA_CMD_TXDH | SDMA_CMD_ERD, ®s->sdma_cmd); /* @@ -614,6 +602,7 @@ static int armdfec_recv(struct eth_device *dev) struct rx_desc *p_rxdesc_curr = darmdfec->p_rxdesc_curr; u32 cmd_sts; u32 timeout = 0; + u32 temp; /* wait untill rx packet available or timeout */ do { @@ -650,15 +639,16 @@ static int armdfec_recv(struct eth_device *dev) } else { /* !!! call higher layer processing */ debug("ARMD100 FEC: (%s) Sending Received packet to" - " upper layer (NetReceive)\n", __func__); + " upper layer (net_process_received_packet)\n", __func__); /* * let the upper layer handle the packet, subtract offset * as two dummy bytes are added in received buffer see * PORT_CONFIG_EXT register bit TWO_Byte_Stuff_Mode bit. */ - NetReceive((p_rxdesc_curr->buf_ptr + RX_BUF_OFFSET), - (int)(p_rxdesc_curr->byte_cnt - RX_BUF_OFFSET)); + net_process_received_packet( + p_rxdesc_curr->buf_ptr + RX_BUF_OFFSET, + (int)(p_rxdesc_curr->byte_cnt - RX_BUF_OFFSET)); } /* * free these descriptors and point next in the ring @@ -667,7 +657,8 @@ static int armdfec_recv(struct eth_device *dev) p_rxdesc_curr->buf_size = PKTSIZE_ALIGN; p_rxdesc_curr->byte_cnt = 0; - writel((u32)p_rxdesc_curr->nxtdesc_p, (u32)&darmdfec->p_rxdesc_curr); + temp = (u32)&darmdfec->p_rxdesc_curr; + writel((u32)p_rxdesc_curr->nxtdesc_p, temp); return 0; } @@ -709,7 +700,7 @@ int armada100_fec_register(unsigned long base_addr) /* Assign ARMADA100 Fast Ethernet Controller Base Address */ darmdfec->regs = (void *)base_addr; - /* must be less than NAMESIZE (16) */ + /* must be less than sizeof(dev->name) */ strcpy(dev->name, "armd-fec0"); dev->init = armdfec_init; @@ -720,7 +711,17 @@ int armada100_fec_register(unsigned long base_addr) eth_register(dev); #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - miiphy_register(dev->name, smi_reg_read, smi_reg_write); + int retval; + struct mii_dev *mdiodev = mdio_alloc(); + if (!mdiodev) + return -ENOMEM; + strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN); + mdiodev->read = smi_reg_read; + mdiodev->write = smi_reg_write; + + retval = mdio_register(mdiodev); + if (retval < 0) + return retval; #endif return 0;