X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fnet%2F4xx_enet.c;h=9ab5c8028c0bc7dff770e03cb056e94694709336;hb=c1761eeab038777c6aa0cbce3c4db63fe5aab037;hp=144b8513578cb97000d780797c1a34f3c2ac6df9;hpb=ca08054e80c64402f6a767a6a188dcfc096eb3b9;p=oweals%2Fu-boot.git diff --git a/drivers/net/4xx_enet.c b/drivers/net/4xx_enet.c index 144b851357..9ab5c8028c 100644 --- a/drivers/net/4xx_enet.c +++ b/drivers/net/4xx_enet.c @@ -87,9 +87,9 @@ #include #include #include -#include -#include -#include <405_mal.h> +#include +#include +#include #include #include @@ -97,10 +97,6 @@ #error "CONFIG_MII has to be defined!" #endif -#if defined(CONFIG_NETCONSOLE) && !defined(CONFIG_NET_MULTI) -#error "CONFIG_NET_MULTI has to be defined for NetConsole" -#endif - #define EMAC_RESET_TIMEOUT 1000 /* 1000 ms reset timeout */ #define PHY_AUTONEGOTIATE_TIMEOUT 5000 /* 5000 ms autonegotiate timeout */ @@ -305,9 +301,9 @@ static void mal_err (struct eth_device *dev, unsigned long isr, static void emac_err (struct eth_device *dev, unsigned long isr); extern int phy_setup_aneg (char *devname, unsigned char addr); -extern int emac4xx_miiphy_read (char *devname, unsigned char addr, +extern int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char reg, unsigned short *value); -extern int emac4xx_miiphy_write (char *devname, unsigned char addr, +extern int emac4xx_miiphy_write (const char *devname, unsigned char addr, unsigned char reg, unsigned short value); int board_emac_count(void); @@ -1185,16 +1181,16 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) } #endif /* defined(CONFIG_PHY_RESET) */ - miiphy_read (dev->name, reg, PHY_BMSR, ®_short); + miiphy_read (dev->name, reg, MII_BMSR, ®_short); /* * Wait if PHY is capable of autonegotiation and autonegotiation is not complete */ - if ((reg_short & PHY_BMSR_AUTN_ABLE) - && !(reg_short & PHY_BMSR_AUTN_COMP)) { + if ((reg_short & BMSR_ANEGCAPABLE) + && !(reg_short & BMSR_ANEGCOMPLETE)) { puts ("Waiting for PHY auto negotiation to complete"); i = 0; - while (!(reg_short & PHY_BMSR_AUTN_COMP)) { + while (!(reg_short & BMSR_ANEGCOMPLETE)) { /* * Timeout reached ? */ @@ -1207,7 +1203,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) putc ('.'); } udelay (1000); /* 1 ms */ - miiphy_read (dev->name, reg, PHY_BMSR, ®_short); + miiphy_read (dev->name, reg, MII_BMSR, ®_short); } puts (" done\n"); udelay (500000); /* another 500 ms (results in faster booting) */ @@ -1494,8 +1490,7 @@ get_speed: /* set speed */ if (speed == _1000BASET) { -#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPE) +#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) unsigned long pfc1; mfsdr (SDR0_PFC1, pfc1); @@ -1705,7 +1700,7 @@ int enetInt (struct eth_device *dev) rc = 0; } - /* handle MAL RX EOB interupt from a receive */ + /* handle MAL RX EOB interrupt from a receive */ /* check for EOB on valid channels */ if (uic_mal & UIC_MAL_RXEOB) { mal_eob = mfdcr(MAL0_RXEOBISR); @@ -2036,6 +2031,13 @@ int ppc_4xx_eth_initialize (bd_t * bis) dev->send = ppc_4xx_eth_send; dev->recv = ppc_4xx_eth_rx; + eth_register(dev); + +#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) + miiphy_register(dev->name, + emac4xx_miiphy_read, emac4xx_miiphy_write); +#endif + if (0 == virgin) { /* set the MAL IER ??? names may change with new spec ??? */ #if defined(CONFIG_440SPE) || \ @@ -2073,13 +2075,6 @@ int ppc_4xx_eth_initialize (bd_t * bis) dev); virgin = 1; } - - eth_register (dev); - -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - miiphy_register (dev->name, - emac4xx_miiphy_read, emac4xx_miiphy_write); -#endif } /* end for each supported device */ return 0;