X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fmtd%2Fspi%2Fspi_flash.c;h=a567414669073f1a947d9d99cc35284c2f1286c6;hb=e6ac28b60be2d670948332197862e314b7977177;hp=7755c4d6fef474a5af45f8c772c135994998805c;hpb=e228d6deb1540b5b11e0df6c28a1a471da44e03a;p=oweals%2Fu-boot.git

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 7755c4d6fe..a567414669 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -29,16 +29,6 @@ static void spi_flash_addr(u32 addr, u8 *cmd)
 	cmd[3] = addr >> 0;
 }
 
-/* Read commands array */
-static u8 spi_read_cmds_array[] = {
-	CMD_READ_ARRAY_SLOW,
-	CMD_READ_ARRAY_FAST,
-	CMD_READ_DUAL_OUTPUT_FAST,
-	CMD_READ_DUAL_IO_FAST,
-	CMD_READ_QUAD_OUTPUT_FAST,
-	CMD_READ_QUAD_IO_FAST,
-};
-
 static int read_sr(struct spi_flash *flash, u8 *rs)
 {
 	int ret;
@@ -121,6 +111,37 @@ static int write_cr(struct spi_flash *flash, u8 wc)
 }
 #endif
 
+#ifdef CONFIG_SPI_FLASH_STMICRO
+static int read_evcr(struct spi_flash *flash, u8 *evcr)
+{
+	int ret;
+	const u8 cmd = CMD_READ_EVCR;
+
+	ret = spi_flash_read_common(flash, &cmd, 1, evcr, 1);
+	if (ret < 0) {
+		debug("SF: error reading EVCR\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int write_evcr(struct spi_flash *flash, u8 evcr)
+{
+	u8 cmd;
+	int ret;
+
+	cmd = CMD_WRITE_EVCR;
+	ret = spi_flash_write_common(flash, &cmd, 1, &evcr, 1);
+	if (ret < 0) {
+		debug("SF: error while writing EVCR register\n");
+		return ret;
+	}
+
+	return 0;
+}
+#endif
+
 #ifdef CONFIG_SPI_FLASH_BAR
 static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)
 {
@@ -149,7 +170,7 @@ static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
 	int ret;
 
 	if (flash->size <= SPI_FLASH_16MB_BOUN)
-		goto bank_end;
+		goto bar_end;
 
 	switch (idcode0) {
 	case SPI_FLASH_CFI_MFR_SPANSION:
@@ -168,7 +189,7 @@ static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
 		return ret;
 	}
 
-bank_end:
+bar_end:
 	flash->bank_curr = curr_bank;
 	return 0;
 }
@@ -810,7 +831,7 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 
 
 #ifdef CONFIG_SPI_FLASH_MACRONIX
-static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
+static int macronix_quad_enable(struct spi_flash *flash)
 {
 	u8 qeb_status;
 	int ret;
@@ -819,12 +840,18 @@ static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
 	if (ret < 0)
 		return ret;
 
-	if (qeb_status & STATUS_QEB_MXIC) {
-		debug("SF: mxic: QEB is already set\n");
-	} else {
-		ret = write_sr(flash, STATUS_QEB_MXIC);
-		if (ret < 0)
-			return ret;
+	if (qeb_status & STATUS_QEB_MXIC)
+		return 0;
+
+	ret = write_sr(flash, qeb_status | STATUS_QEB_MXIC);
+	if (ret < 0)
+		return ret;
+
+	/* read SR and check it */
+	ret = read_sr(flash, &qeb_status);
+	if (!(ret >= 0 && (qeb_status & STATUS_QEB_MXIC))) {
+		printf("SF: Macronix SR Quad bit not clear\n");
+		return -EINVAL;
 	}
 
 	return ret;
@@ -832,7 +859,7 @@ static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
 #endif
 
 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
-static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
+static int spansion_quad_enable(struct spi_flash *flash)
 {
 	u8 qeb_status;
 	int ret;
@@ -841,34 +868,67 @@ static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
 	if (ret < 0)
 		return ret;
 
-	if (qeb_status & STATUS_QEB_WINSPAN) {
-		debug("SF: winspan: QEB is already set\n");
-	} else {
-		ret = write_cr(flash, STATUS_QEB_WINSPAN);
-		if (ret < 0)
-			return ret;
+	if (qeb_status & STATUS_QEB_WINSPAN)
+		return 0;
+
+	ret = write_cr(flash, qeb_status | STATUS_QEB_WINSPAN);
+	if (ret < 0)
+		return ret;
+
+	/* read CR and check it */
+	ret = read_cr(flash, &qeb_status);
+	if (!(ret >= 0 && (qeb_status & STATUS_QEB_WINSPAN))) {
+		printf("SF: Spansion CR Quad bit not clear\n");
+		return -EINVAL;
+	}
+
+	return ret;
+}
+#endif
+
+#ifdef CONFIG_SPI_FLASH_STMICRO
+static int micron_quad_enable(struct spi_flash *flash)
+{
+	u8 qeb_status;
+	int ret;
+
+	ret = read_evcr(flash, &qeb_status);
+	if (ret < 0)
+		return ret;
+
+	if (!(qeb_status & STATUS_QEB_MICRON))
+		return 0;
+
+	ret = write_evcr(flash, qeb_status & ~STATUS_QEB_MICRON);
+	if (ret < 0)
+		return ret;
+
+	/* read EVCR and check it */
+	ret = read_evcr(flash, &qeb_status);
+	if (!(ret >= 0 && !(qeb_status & STATUS_QEB_MICRON))) {
+		printf("SF: Micron EVCR Quad bit not clear\n");
+		return -EINVAL;
 	}
 
 	return ret;
 }
 #endif
 
-static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
+static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
 {
 	switch (idcode0) {
 #ifdef CONFIG_SPI_FLASH_MACRONIX
 	case SPI_FLASH_CFI_MFR_MACRONIX:
-		return spi_flash_set_qeb_mxic(flash);
+		return macronix_quad_enable(flash);
 #endif
 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
 	case SPI_FLASH_CFI_MFR_SPANSION:
 	case SPI_FLASH_CFI_MFR_WINBOND:
-		return spi_flash_set_qeb_winspan(flash);
+		return spansion_quad_enable(flash);
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO
 	case SPI_FLASH_CFI_MFR_STMICRO:
-		debug("SF: QEB is volatile for %02x flash\n", idcode0);
-		return 0;
+		return micron_quad_enable(flash);
 #endif
 	default:
 		printf("SF: Need set QEB func for %02x flash\n", idcode0);
@@ -909,9 +969,15 @@ int spi_flash_scan(struct spi_flash *flash)
 	struct spi_slave *spi = flash->spi;
 	const struct spi_flash_params *params;
 	u16 jedec, ext_jedec;
-	u8 idcode[5];
-	u8 cmd;
+	u8 cmd, idcode[5];
 	int ret;
+	static u8 spi_read_cmds_array[] = {
+		CMD_READ_ARRAY_SLOW,
+		CMD_READ_ARRAY_FAST,
+		CMD_READ_DUAL_OUTPUT_FAST,
+		CMD_READ_QUAD_OUTPUT_FAST,
+		CMD_READ_DUAL_IO_FAST,
+		CMD_READ_QUAD_IO_FAST };
 
 	/* Read the ID codes */
 	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
@@ -968,7 +1034,7 @@ int spi_flash_scan(struct spi_flash *flash)
 	flash->write = spi_flash_cmd_write_ops;
 #if defined(CONFIG_SPI_FLASH_SST)
 	if (flash->flags & SNOR_F_SST_WR) {
-		if (spi->op_mode_tx & SPI_OPM_TX_BP)
+		if (spi->mode & SPI_TX_BYTE)
 			flash->write = sst_write_bp;
 		else
 			flash->write = sst_write_wp;
@@ -1032,7 +1098,7 @@ int spi_flash_scan(struct spi_flash *flash)
 	flash->sector_size = flash->erase_size;
 
 	/* Look for the fastest read cmd */
-	cmd = fls(params->e_rd_cmd & spi->op_mode_rx);
+	cmd = fls(params->e_rd_cmd & spi->mode_rx);
 	if (cmd) {
 		cmd = spi_read_cmds_array[cmd - 1];
 		flash->read_cmd = cmd;
@@ -1042,7 +1108,7 @@ int spi_flash_scan(struct spi_flash *flash)
 	}
 
 	/* Not require to look for fastest only two write cmds yet */
-	if (params->flags & WR_QPP && spi->op_mode_tx & SPI_OPM_TX_QPP)
+	if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
 		flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
 	else
 		/* Go for default supported write cmd */
@@ -1052,7 +1118,7 @@ int spi_flash_scan(struct spi_flash *flash)
 	if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
 	    (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
 	    (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
-		ret = spi_flash_set_qeb(flash, idcode[0]);
+		ret = set_quad_mode(flash, idcode[0]);
 		if (ret) {
 			debug("SF: Fail to set QEB for %02x\n", idcode[0]);
 			return -EINVAL;