X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fmmc%2Fsocfpga_dw_mmc.c;h=759686ccd63ec082c66acda7a923548c29509b6d;hb=31f044bd91df58bed6bb8cfadfc187eedac1442e;hp=6a0e9719b8a49cb354b46ed711350e2bb47a2293;hpb=826d06dbdd0e29ab0d8bd76d1ca640e2dfdb076c;p=oweals%2Fu-boot.git

diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 6a0e9719b8..759686ccd6 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -22,6 +22,11 @@ static const struct socfpga_clock_manager *clock_manager_base =
 static const struct socfpga_system_manager *system_manager_base =
 		(void *)SOCFPGA_SYSMGR_ADDRESS;
 
+struct socfpga_dwmci_plat {
+	struct mmc_config cfg;
+	struct mmc mmc;
+};
+
 /* socfpga implmentation specific driver private data */
 struct dwmci_socfpga_priv_data {
 	struct dwmci_host	host;
@@ -65,7 +70,7 @@ static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+	fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 				    "fifo-depth", 0);
 	if (fifo_depth < 0) {
 		printf("DWMMC: Can't get FIFO depth\n");
@@ -73,8 +78,8 @@ static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev)
 	}
 
 	host->name = dev->name;
-	host->ioaddr = (void *)dev_get_addr(dev);
-	host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+	host->ioaddr = (void *)devfdt_get_addr(dev);
+	host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 					"bus-width", 4);
 	host->clksel = socfpga_dwmci_clksel;
 
@@ -87,9 +92,9 @@ static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev)
 	host->bus_hz = clk;
 	host->fifoth_val = MSIZE(0x2) |
 		RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
-	priv->drvsel = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+	priv->drvsel = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
 				       "drvsel", 3);
-	priv->smplsel = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+	priv->smplsel = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
 					"smplsel", 0);
 	host->priv = priv;
 
@@ -98,21 +103,44 @@ static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev)
 
 static int socfpga_dwmmc_probe(struct udevice *dev)
 {
+#ifdef CONFIG_BLK
+	struct socfpga_dwmci_plat *plat = dev_get_platdata(dev);
+#endif
 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 	struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev);
 	struct dwmci_host *host = &priv->host;
+
+#ifdef CONFIG_BLK
+	dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000);
+	host->mmc = &plat->mmc;
+#else
 	int ret;
 
 	ret = add_dwmci(host, host->bus_hz, 400000);
 	if (ret)
 		return ret;
-
+#endif
+	host->mmc->priv = &priv->host;
 	upriv->mmc = host->mmc;
 	host->mmc->dev = dev;
 
 	return 0;
 }
 
+static int socfpga_dwmmc_bind(struct udevice *dev)
+{
+#ifdef CONFIG_BLK
+	struct socfpga_dwmci_plat *plat = dev_get_platdata(dev);
+	int ret;
+
+	ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+
 static const struct udevice_id socfpga_dwmmc_ids[] = {
 	{ .compatible = "altr,socfpga-dw-mshc" },
 	{ }
@@ -123,6 +151,9 @@ U_BOOT_DRIVER(socfpga_dwmmc_drv) = {
 	.id		= UCLASS_MMC,
 	.of_match	= socfpga_dwmmc_ids,
 	.ofdata_to_platdata = socfpga_dwmmc_ofdata_to_platdata,
+	.ops		= &dm_dwmci_ops,
+	.bind		= socfpga_dwmmc_bind,
 	.probe		= socfpga_dwmmc_probe,
 	.priv_auto_alloc_size = sizeof(struct dwmci_socfpga_priv_data),
+	.platdata_auto_alloc_size = sizeof(struct socfpga_dwmci_plat),
 };