X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fmmc%2Fmeson_gx_mmc.c;h=b7f793cd0479d88d84c089a8947748427777d2b0;hb=c05ed00afb95fa5237f16962fccf5810437317bf;hp=4652fab45e283fdda986bc63316c3e5f8d82483a;hpb=821560fd8e43eecc208c1c52ad24faadb6b52703;p=oweals%2Fu-boot.git

diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index 4652fab45e..b7f793cd04 100644
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -1,16 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2016 Carlo Caione <carlo@caione.org>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <clk.h>
+#include <cpu_func.h>
 #include <dm.h>
 #include <fdtdec.h>
 #include <malloc.h>
+#include <pwrseq.h>
 #include <mmc.h>
 #include <asm/io.h>
+#include <asm/gpio.h>
 #include <asm/arch/sd_emmc.h>
+#include <linux/delay.h>
 #include <linux/log2.h>
 
 static inline void *get_regbase(const struct mmc *mmc)
@@ -35,6 +39,9 @@ static void meson_mmc_config_clock(struct mmc *mmc)
 	uint32_t meson_mmc_clk = 0;
 	unsigned int clk, clk_src, clk_div;
 
+	if (!mmc->clock)
+		return;
+
 	/* 1GHz / CLK_MAX_DIV = 15,9 MHz */
 	if (mmc->clock > 16000000) {
 		clk = SD_EMMC_CLKSRC_DIV2;
@@ -236,7 +243,22 @@ static int meson_mmc_probe(struct udevice *dev)
 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 	struct mmc *mmc = &pdata->mmc;
 	struct mmc_config *cfg = &pdata->cfg;
+	struct clk_bulk clocks;
 	uint32_t val;
+	int ret;
+
+#ifdef CONFIG_PWRSEQ
+	struct udevice *pwr_dev;
+#endif
+
+	/* Enable the clocks feeding the MMC controller */
+	ret = clk_get_bulk(dev, &clocks);
+	if (ret)
+		return ret;
+
+	ret = clk_enable_bulk(&clocks);
+	if (ret)
+		return ret;
 
 	cfg->voltages = MMC_VDD_33_34 | MMC_VDD_32_33 |
 			MMC_VDD_31_32 | MMC_VDD_165_195;
@@ -250,7 +272,18 @@ static int meson_mmc_probe(struct udevice *dev)
 	mmc->priv = pdata;
 	upriv->mmc = mmc;
 
-	mmc_set_clock(mmc, cfg->f_min);
+	mmc_set_clock(mmc, cfg->f_min, MMC_CLK_ENABLE);
+
+#ifdef CONFIG_PWRSEQ
+	/* Enable power if needed */
+	ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
+					   &pwr_dev);
+	if (!ret) {
+		ret = pwrseq_set_power(pwr_dev, true);
+		if (ret)
+			return ret;
+	}
+#endif
 
 	/* reset all status bits */
 	meson_write(mmc, STATUS_MASK, MESON_SD_EMMC_STATUS);
@@ -276,6 +309,7 @@ int meson_mmc_bind(struct udevice *dev)
 
 static const struct udevice_id meson_mmc_match[] = {
 	{ .compatible = "amlogic,meson-gx-mmc" },
+	{ .compatible = "amlogic,meson-axg-mmc" },
 	{ /* sentinel */ }
 };
 
@@ -289,3 +323,37 @@ U_BOOT_DRIVER(meson_mmc) = {
 	.ofdata_to_platdata = meson_mmc_ofdata_to_platdata,
 	.platdata_auto_alloc_size = sizeof(struct meson_mmc_platdata),
 };
+
+#ifdef CONFIG_PWRSEQ
+static int meson_mmc_pwrseq_set_power(struct udevice *dev, bool enable)
+{
+	struct gpio_desc reset;
+	int ret;
+
+	ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
+	if (ret)
+		return ret;
+	dm_gpio_set_value(&reset, 1);
+	udelay(1);
+	dm_gpio_set_value(&reset, 0);
+	udelay(200);
+
+	return 0;
+}
+
+static const struct pwrseq_ops meson_mmc_pwrseq_ops = {
+	.set_power	= meson_mmc_pwrseq_set_power,
+};
+
+static const struct udevice_id meson_mmc_pwrseq_ids[] = {
+	{ .compatible = "mmc-pwrseq-emmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(meson_mmc_pwrseq_drv) = {
+	.name		= "mmc_pwrseq_emmc",
+	.id		= UCLASS_PWRSEQ,
+	.of_match	= meson_mmc_pwrseq_ids,
+	.ops		= &meson_mmc_pwrseq_ops,
+};
+#endif