X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fmmc%2Fhi6220_dw_mmc.c;h=effd1e4c7c849fa43095ebeb47c7ab0d305696b1;hb=992bcf4f27794a7f578e0145ef1c933a87a1d83c;hp=44a8ef825f32c55251d69b86c9fedb677b1f7c63;hpb=2ee87b0c1a5439e4ad6467cb8d5e8fb58922ca4b;p=oweals%2Fu-boot.git

diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
index 44a8ef825f..effd1e4c7c 100644
--- a/drivers/mmc/hi6220_dw_mmc.c
+++ b/drivers/mmc/hi6220_dw_mmc.c
@@ -1,56 +1,94 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2015 Linaro
  * peter.griffin <peter.griffin@linaro.org>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <dm.h>
 #include <dwmmc.h>
+#include <errno.h>
+#include <fdtdec.h>
 #include <malloc.h>
-#include <linux/errno.h>
 
-#define	DWMMC_MAX_CH_NUM		4
+DECLARE_GLOBAL_DATA_PTR;
 
-#define	DWMMC_MAX_FREQ			50000000
-#define	DWMMC_MIN_FREQ			400000
+struct hi6220_dwmmc_plat {
+	struct mmc_config cfg;
+	struct mmc mmc;
+};
 
-/* Source clock is configured to 100MHz by ATF bl1*/
-#define MMC0_DEFAULT_FREQ		100000000
+struct hi6220_dwmmc_priv_data {
+	struct dwmci_host host;
+};
 
-static int hi6220_dwmci_core_init(struct dwmci_host *host, int index)
+static int hi6220_dwmmc_ofdata_to_platdata(struct udevice *dev)
 {
-	host->name = "Hisilicon DWMMC";
+	struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev);
+	struct dwmci_host *host = &priv->host;
 
-	host->dev_index = index;
+	host->name = dev->name;
+	host->ioaddr = (void *)devfdt_get_addr(dev);
+	host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+					"bus-width", 4);
+
+	/* use non-removable property for differentiating SD card and eMMC */
+	if (dev_read_bool(dev, "non-removable"))
+		host->dev_index = 0;
+	else
+		host->dev_index = 1;
+
+	host->priv = priv;
 
-	/* Add the mmc channel to be registered with mmc core */
-	if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) {
-		printf("DWMMC%d registration failed\n", index);
-		return -1;
-	}
 	return 0;
 }
 
-/*
- * This function adds the mmc channel to be registered with mmc core.
- * index -	mmc channel number.
- * regbase -	register base address of mmc channel specified in 'index'.
- * bus_width -	operating bus width of mmc channel specified in 'index'.
- */
-int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)
+static int hi6220_dwmmc_probe(struct udevice *dev)
 {
-	struct dwmci_host *host = NULL;
+	struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev);
+	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+	struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev);
+	struct dwmci_host *host = &priv->host;
 
-	host = calloc(1, sizeof(struct dwmci_host));
-	if (!host) {
-		pr_err("dwmci_host calloc failed!\n");
-		return -ENOMEM;
-	}
+	/* Use default bus speed due to absence of clk driver */
+	host->bus_hz = 50000000;
 
-	host->ioaddr = (void *)(ulong)regbase;
-	host->buswidth = bus_width;
-	host->bus_hz = MMC0_DEFAULT_FREQ;
+	dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000);
+	host->mmc = &plat->mmc;
 
-	return hi6220_dwmci_core_init(host, index);
+	host->mmc->priv = &priv->host;
+	upriv->mmc = host->mmc;
+	host->mmc->dev = dev;
+
+	return dwmci_probe(dev);
 }
+
+static int hi6220_dwmmc_bind(struct udevice *dev)
+{
+	struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev);
+	int ret;
+
+	ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static const struct udevice_id hi6220_dwmmc_ids[] = {
+	{ .compatible = "hisilicon,hi6220-dw-mshc" },
+	{ .compatible = "hisilicon,hi3798cv200-dw-mshc" },
+	{ }
+};
+
+U_BOOT_DRIVER(hi6220_dwmmc_drv) = {
+	.name = "hi6220_dwmmc",
+	.id = UCLASS_MMC,
+	.of_match = hi6220_dwmmc_ids,
+	.ofdata_to_platdata = hi6220_dwmmc_ofdata_to_platdata,
+	.ops = &dm_dwmci_ops,
+	.bind = hi6220_dwmmc_bind,
+	.probe = hi6220_dwmmc_probe,
+	.priv_auto_alloc_size = sizeof(struct hi6220_dwmmc_priv_data),
+	.platdata_auto_alloc_size = sizeof(struct hi6220_dwmmc_plat),
+};