X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fgpio%2Fs3c2440_gpio.c;h=d6c7eeb69377545d0c40162e0a830706f47fcf58;hb=770ee0174223e824a721f5f164cc8b2bf7473189;hp=e1e2d3f805e81ec7c81071fb46e4919670c75a67;hpb=5b9c79a81db80c3f9e50c77477957cd803429af8;p=oweals%2Fu-boot.git

diff --git a/drivers/gpio/s3c2440_gpio.c b/drivers/gpio/s3c2440_gpio.c
index e1e2d3f805..d6c7eeb693 100644
--- a/drivers/gpio/s3c2440_gpio.c
+++ b/drivers/gpio/s3c2440_gpio.c
@@ -8,53 +8,50 @@
 #include <asm/arch/s3c2440.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <errno.h>
 
 #define GPIO_INPUT  0x0
 #define GPIO_OUTPUT 0x1
 
-/* 0x4 means that we want DAT and not CON register */
-#define GPIO_PORT(x)	((((x) >> 5) & 0x3) + 0x4)
-#define GPIO_BIT(x)		((x) & 0x3f)
+#define S3C_GPIO_CON	0x0
+#define S3C_GPIO_DAT	0x4
 
-/*
- * It's how we calculate the full port address
- * We have to get the number of the port + 1 (Port A is at 0x56000001 ...)
- * We move it at the second digit, and finally we add 0x4 because we want
- * to modify GPIO DAT and not CON
- */
-#define GPIO_FULLPORT(x) (S3C24X0_GPIO_BASE | ((GPIO_PORT(gpio) + 1) << 1))
+static uint32_t s3c_gpio_get_bank_addr(unsigned gpio)
+{
+	/* There is up to 16 pins per bank, one bank is 0x10 big. */
+	uint32_t addr = gpio & ~0xf;
+
+	if (addr >= 0x80 && addr != 0xd0) {	/* Wrong GPIO bank. */
+		printf("Invalid GPIO bank (bank %02x)\n", addr);
+		return 0xffffffff;
+	}
+
+	return addr | S3C24X0_GPIO_BASE;
+}
 
 int gpio_set_value(unsigned gpio, int value)
 {
-	unsigned l = readl(GPIO_FULLPORT(gpio));
-	unsigned bit;
-	unsigned port = GPIO_FULLPORT(gpio);
-
-	/*
-	 * All GPIO Port have a configuration on
-	 * 2 bits excepted the first GPIO (A) which
-	 * have only 1 bit of configuration.
-	 */
-	if (!GPIO_PORT(gpio))
-		bit = (0x1 << GPIO_BIT(gpio));
-	else
-		bit = (0x3 << GPIO_BIT(gpio));
+	uint32_t addr = s3c_gpio_get_bank_addr(gpio);
+
+	if (addr == 0xffffffff)
+		return -EINVAL;
 
 	if (value)
-		l |= bit;
+		setbits_le32(addr | S3C_GPIO_DAT, 1 << (gpio & 0xf));
 	else
-		l &= ~bit;
+		clrbits_le32(addr | S3C_GPIO_DAT, 1 << (gpio & 0xf));
 
-	return writel(l, port);
+	return 0;
 }
 
 int gpio_get_value(unsigned gpio)
 {
-	unsigned l = readl(GPIO_FULLPORT(gpio));
+	uint32_t addr = s3c_gpio_get_bank_addr(gpio);
+
+	if (addr == 0xffffffff)
+		return -EINVAL;
 
-	if (GPIO_PORT(gpio) == 0) /* PORT A */
-		return (l >> GPIO_BIT(gpio)) & 0x1;
-	return (l >> GPIO_BIT(gpio)) & 0x3;
+	return !!(readl(addr | S3C_GPIO_DAT) & (1 << (gpio & 0xf)));
 }
 
 int gpio_request(unsigned gpio, const char *label)
@@ -67,13 +64,25 @@ int gpio_free(unsigned gpio)
 	return 0;
 }
 
+static int s3c_gpio_direction(unsigned gpio, uint8_t dir)
+{
+	uint32_t addr = s3c_gpio_get_bank_addr(gpio);
+	const uint32_t mask = 0x3 << ((gpio & 0xf) << 1);
+	const uint32_t dirm = dir << ((gpio & 0xf) << 1);
+
+	if (addr == 0xffffffff)
+		return -EINVAL;
+
+	clrsetbits_le32(addr | S3C_GPIO_CON, mask, dirm);
+	return 0;
+}
+
 int gpio_direction_input(unsigned gpio)
 {
-	return writel(GPIO_INPUT << GPIO_BIT(gpio), GPIO_FULLPORT(gpio));
+	return s3c_gpio_direction(gpio, GPIO_INPUT);
 }
 
 int gpio_direction_output(unsigned gpio, int value)
 {
-	writel(GPIO_OUTPUT << GPIO_BIT(gpio), GPIO_FULLPORT(gpio));
-	return gpio_set_value(gpio, value);
+	return s3c_gpio_direction(gpio, GPIO_OUTPUT);
 }