X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fgpio%2Frk_gpio.c;h=3d96678a45a71a0ada12767aeba690ff33fa29fe;hb=90c2ebd2156982eee1af6faa00f6740e9f79b3c5;hp=a8f311bbd675af265477e60f47cdab6ae9b640e9;hpb=83d290c56fab2d38cd1ab4c4cc7099559c1d5046;p=oweals%2Fu-boot.git

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index a8f311bbd6..3d96678a45 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -12,7 +12,8 @@
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
-#include <asm/arch/clock.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/gpio.h>
 #include <dm/pinctrl.h>
 #include <dt-bindings/clock/rk3288-cru.h>
 
@@ -91,6 +92,52 @@ static int rockchip_gpio_get_function(struct udevice *dev, unsigned offset)
 #endif
 }
 
+/* Simple SPL interface to GPIOs */
+#ifdef CONFIG_SPL_BUILD
+
+enum {
+	PULL_NONE_1V8 = 0,
+	PULL_DOWN_1V8 = 1,
+	PULL_UP_1V8 = 3,
+};
+
+int spl_gpio_set_pull(void *vregs, uint gpio, int pull)
+{
+	u32 *regs = vregs;
+	uint val;
+
+	regs += gpio >> GPIO_BANK_SHIFT;
+	gpio &= GPIO_OFFSET_MASK;
+	switch (pull) {
+	case GPIO_PULL_UP:
+		val = PULL_UP_1V8;
+		break;
+	case GPIO_PULL_DOWN:
+		val = PULL_DOWN_1V8;
+		break;
+	case GPIO_PULL_NORMAL:
+	default:
+		val = PULL_NONE_1V8;
+		break;
+	}
+	clrsetbits_le32(regs, 3 << (gpio * 2), val << (gpio * 2));
+
+	return 0;
+}
+
+int spl_gpio_output(void *vregs, uint gpio, int value)
+{
+	struct rockchip_gpio_regs * const regs = vregs;
+
+	clrsetbits_le32(&regs->swport_dr, 1 << gpio, value << gpio);
+
+	/* Set direction */
+	clrsetbits_le32(&regs->swport_ddr, 1 << gpio, 1 << gpio);
+
+	return 0;
+}
+#endif /* CONFIG_SPL_BUILD */
+
 static int rockchip_gpio_probe(struct udevice *dev)
 {
 	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);