X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fgpio%2Flpc32xx_gpio.c;h=1bf945acfc634de960b3f5746f11c805dfaaf25e;hb=770ee0174223e824a721f5f164cc8b2bf7473189;hp=96b312592b9fa8b92fbeb50b14862dc9d9e65ea9;hpb=606f7047603422746d112e41937649d44f311af4;p=oweals%2Fu-boot.git

diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c
index 96b312592b..1bf945acfc 100644
--- a/drivers/gpio/lpc32xx_gpio.c
+++ b/drivers/gpio/lpc32xx_gpio.c
@@ -22,7 +22,7 @@
  *   read on another one.
 *
  * In order to keep this code simple, GPIOS are considered here as
- * homogeneous and linear, from 0 to 127.
+ * homogeneous and linear, from 0 to 159.
  *
  *	** WARNING #1 **
  *
@@ -35,9 +35,9 @@
  * Please read NOTE in description of lpc32xx_gpio_get_function().
  */
 
-#define LPC32XX_GPIOS 128
+#define LPC32XX_GPIOS 160
 
-struct lpc32xx_gpio_platdata {
+struct lpc32xx_gpio_priv {
 	struct gpio_regs *regs;
 	/* GPIO FUNCTION: SEE WARNING #2 */
 	signed char function[LPC32XX_GPIOS];
@@ -45,11 +45,18 @@ struct lpc32xx_gpio_platdata {
 
 /**
  * We have 4 GPIO ports of 32 bits each
+ *
+ * Port mapping offset (32 bits each):
+ * - Port 0: 0
+ * - Port 1: 32
+ * - Port 2: 64
+ * - Port 3: GPO / GPIO (output): 96
+ * - Port 3: GPI: 128
  */
 
-#define MAX_GPIO 128
+#define MAX_GPIO 160
 
-#define GPIO_TO_PORT(gpio) ((gpio / 32) & 3)
+#define GPIO_TO_PORT(gpio) ((gpio / 32) & 7)
 #define GPIO_TO_RANK(gpio) (gpio % 32)
 #define GPIO_TO_MASK(gpio) (1 << (gpio % 32))
 
@@ -60,8 +67,8 @@ struct lpc32xx_gpio_platdata {
 static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
 {
 	int port, mask;
-	struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
-	struct gpio_regs *regs = gpio_platdata->regs;
+	struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+	struct gpio_regs *regs = gpio_priv->regs;
 
 	port = GPIO_TO_PORT(offset);
 	mask = GPIO_TO_MASK(offset);
@@ -75,15 +82,22 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
 		break;
 	case 2:
 		/* ports 2 and 3 share a common direction */
-	case 3:
 		writel(mask, &regs->p2_p3_dir_clr);
 		break;
+	case 3:
+		/* Setup direction only for GPIO_xx. */
+		if ((mask >= 25) && (mask <= 30))
+			writel(mask, &regs->p2_p3_dir_clr);
+		break;
+	case 4:
+		/* GPI_xx; nothing to do. */
+		break;
 	default:
 		return -1;
 	}
 
 	/* GPIO FUNCTION: SEE WARNING #2 */
-	gpio_platdata->function[offset] = GPIOF_INPUT;
+	gpio_priv->function[offset] = GPIOF_INPUT;
 
 	return 0;
 }
@@ -95,8 +109,8 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
 static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
 {
 	int port, rank, mask, value;
-	struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
-	struct gpio_regs *regs = gpio_platdata->regs;
+	struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+	struct gpio_regs *regs = gpio_priv->regs;
 
 	port = GPIO_TO_PORT(offset);
 
@@ -111,6 +125,11 @@ static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
 		value = readl(&regs->p2_inp_state);
 		break;
 	case 3:
+		/* Read GPO_xx and GPIO_xx (as output) using p3_outp_state. */
+		value = readl(&regs->p3_outp_state);
+		break;
+	case 4:
+		/* Read GPI_xx and GPIO_xx (as input) using p3_inp_state. */
 		value = readl(&regs->p3_inp_state);
 		break;
 	default:
@@ -130,8 +149,8 @@ static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
 static int gpio_set(struct udevice *dev, unsigned gpio)
 {
 	int port, mask;
-	struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
-	struct gpio_regs *regs = gpio_platdata->regs;
+	struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+	struct gpio_regs *regs = gpio_priv->regs;
 
 	port = GPIO_TO_PORT(gpio);
 	mask = GPIO_TO_MASK(gpio);
@@ -149,6 +168,8 @@ static int gpio_set(struct udevice *dev, unsigned gpio)
 	case 3:
 		writel(mask, &regs->p3_outp_set);
 		break;
+	case 4:
+		/* GPI_xx; invalid. */
 	default:
 		return -1;
 	}
@@ -162,8 +183,8 @@ static int gpio_set(struct udevice *dev, unsigned gpio)
 static int gpio_clr(struct udevice *dev, unsigned gpio)
 {
 	int port, mask;
-	struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
-	struct gpio_regs *regs = gpio_platdata->regs;
+	struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+	struct gpio_regs *regs = gpio_priv->regs;
 
 	port = GPIO_TO_PORT(gpio);
 	mask = GPIO_TO_MASK(gpio);
@@ -181,6 +202,8 @@ static int gpio_clr(struct udevice *dev, unsigned gpio)
 	case 3:
 		writel(mask, &regs->p3_outp_clr);
 		break;
+	case 4:
+		/* GPI_xx; invalid. */
 	default:
 		return -1;
 	}
@@ -208,8 +231,8 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset,
 				       int value)
 {
 	int port, mask;
-	struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
-	struct gpio_regs *regs = gpio_platdata->regs;
+	struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+	struct gpio_regs *regs = gpio_priv->regs;
 
 	port = GPIO_TO_PORT(offset);
 	mask = GPIO_TO_MASK(offset);
@@ -223,15 +246,21 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset,
 		break;
 	case 2:
 		/* ports 2 and 3 share a common direction */
-	case 3:
 		writel(mask, &regs->p2_p3_dir_set);
 		break;
+	case 3:
+		/* Setup direction only for GPIO_xx. */
+		if ((mask >= 25) && (mask <= 30))
+			writel(mask, &regs->p2_p3_dir_set);
+		break;
+	case 4:
+		/* GPI_xx; invalid. */
 	default:
 		return -1;
 	}
 
 	/* GPIO FUNCTION: SEE WARNING #2 */
-	gpio_platdata->function[offset] = GPIOF_OUTPUT;
+	gpio_priv->function[offset] = GPIOF_OUTPUT;
 
 	return lpc32xx_gpio_set_value(dev, offset, value);
 }
@@ -251,8 +280,8 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset,
 
 static int lpc32xx_gpio_get_function(struct udevice *dev, unsigned offset)
 {
-	struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
-	return gpio_platdata->function[offset];
+	struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+	return gpio_priv->function[offset];
 }
 
 static const struct dm_gpio_ops gpio_lpc32xx_ops = {
@@ -265,21 +294,20 @@ static const struct dm_gpio_ops gpio_lpc32xx_ops = {
 
 static int lpc32xx_gpio_probe(struct udevice *dev)
 {
-	struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
+	struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
 	struct gpio_dev_priv *uc_priv = dev->uclass_priv;
 
-	if (dev->of_offset == -1) {
+	if (dev_of_offset(dev) == -1) {
 		/* Tell the uclass how many GPIOs we have */
 		uc_priv->gpio_count = LPC32XX_GPIOS;
 	}
 
 	/* set base address for GPIO registers */
-	gpio_platdata->regs = (struct gpio_regs *)GPIO_BASE;
+	gpio_priv->regs = (struct gpio_regs *)GPIO_BASE;
 
 	/* all GPIO functions are unknown until requested */
 	/* GPIO FUNCTION: SEE WARNING #2 */
-	memset(gpio_platdata->function, GPIOF_UNKNOWN,
-	       sizeof(gpio_platdata->function));
+	memset(gpio_priv->function, GPIOF_UNKNOWN, sizeof(gpio_priv->function));
 
 	return 0;
 }
@@ -289,5 +317,5 @@ U_BOOT_DRIVER(gpio_lpc32xx) = {
 	.id	= UCLASS_GPIO,
 	.ops	= &gpio_lpc32xx_ops,
 	.probe	= lpc32xx_gpio_probe,
-	.priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_platdata),
+	.priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_priv),
 };