X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fddr%2Ffsl%2Fmpc85xx_ddr_gen3.c;h=ab8d2deaf9f490d1e53a7ea25d454a7e94815fa9;hb=60c7facfc965af6ff8ea14ee26c9d49cd2d0ec22;hp=653b7f0c770c965f0e31f84271c478d441413d06;hpb=82d72a1b9967cff4908f22c57536c3660f794401;p=oweals%2Fu-boot.git diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c index 653b7f0c77..ab8d2deaf9 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c @@ -1,13 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright 2008-2012 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0 */ #include +#include #include #include #include +#include #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4) #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL @@ -44,17 +45,17 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, case 0: ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR; break; -#if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1) +#if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1) case 1: ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; break; #endif -#if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2) +#if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) case 2: ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; break; #endif -#if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3) +#if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 3) case 3: ddr = (void *)CONFIG_SYS_FSL_DDR4_ADDR; break; @@ -174,9 +175,6 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, out_be32(&ddr->debug[i], regs->debug[i]); } } -#ifdef CONFIG_SYS_FSL_ERRATUM_A_004934 - out_be32(&ddr->debug[28], 0x30003000); -#endif #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003474 out_be32(&ddr->debug[12], 0x00000015);