X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=drivers%2Fclk%2Frockchip%2Fclk_rk3036.c;h=274572f70c14ef39cbc14316bd540cb1848970af;hb=c05ed00afb95fa5237f16962fccf5810437317bf;hp=510a00a3aaf32f0a33f54335c2d6bda87f4eb505;hpb=e38c66edae1b05c472dc6c594eae1ed61e7ccdbf;p=oweals%2Fu-boot.git diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c index 510a00a3aa..274572f70c 100644 --- a/drivers/clk/rockchip/clk_rk3036.c +++ b/drivers/clk/rockchip/clk_rk3036.c @@ -1,23 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 /* * (C) Copyright 2015 Google, Inc - * - * SPDX-License-Identifier: GPL-2.0 */ #include #include #include #include +#include +#include #include #include -#include -#include -#include +#include +#include +#include #include #include +#include #include - -DECLARE_GLOBAL_DATA_PTR; +#include enum { VCO_MAX_HZ = 2400U * 1000000, @@ -317,11 +318,19 @@ static struct clk_ops rk3036_clk_ops = { .set_rate = rk3036_clk_set_rate, }; +static int rk3036_clk_ofdata_to_platdata(struct udevice *dev) +{ + struct rk3036_clk_priv *priv = dev_get_priv(dev); + + priv->cru = dev_read_addr_ptr(dev); + + return 0; +} + static int rk3036_clk_probe(struct udevice *dev) { struct rk3036_clk_priv *priv = dev_get_priv(dev); - priv->cru = (struct rk3036_cru *)devfdt_get_addr(dev); rkclk_init(priv->cru); return 0; @@ -347,7 +356,7 @@ static int rk3036_clk_bind(struct udevice *dev) sys_child->priv = priv; } -#if CONFIG_IS_ENABLED(CONFIG_RESET_ROCKCHIP) +#if CONFIG_IS_ENABLED(RESET_ROCKCHIP) ret = offsetof(struct rk3036_cru, cru_softrst_con[0]); ret = rockchip_reset_bind(dev, ret, 9); if (ret) @@ -367,6 +376,7 @@ U_BOOT_DRIVER(rockchip_rk3036_cru) = { .id = UCLASS_CLK, .of_match = rk3036_clk_ids, .priv_auto_alloc_size = sizeof(struct rk3036_clk_priv), + .ofdata_to_platdata = rk3036_clk_ofdata_to_platdata, .ops = &rk3036_clk_ops, .bind = rk3036_clk_bind, .probe = rk3036_clk_probe,