X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=doc%2FREADME.uniphier;h=f79659c9cabdef273609b2f1afa95a541559cc09;hb=e9eb0cb20a12f4ef55e229555efa6e726274dfdc;hp=f0f5346f53feebffe2e3811261aa98df2afc5aea;hpb=40253dd12a64086885097d253b665c9876635e76;p=oweals%2Fu-boot.git diff --git a/doc/README.uniphier b/doc/README.uniphier index f0f5346f53..f79659c9ca 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -2,82 +2,111 @@ U-Boot for UniPhier SoC family ============================== -Tested toolchains ------------------ - - (a) Ubuntu packages (CROSS_COMPILE=arm-linux-gnueabi-) - - If you are building U-Boot on Ubuntu, its standard package is recommended. - You can install it as follows: - - $ sudo apt-get install gcc-arm-linux-gnueabi- +Recommended toolchains +---------------------- - (b) Linaro compilers (CROSS_COMPILE=arm-linux-gnueabihf-) - - You can download pre-built toolchains from: +The UniPhir platform is well tested with Linaro toolchanis. +You can download pre-built toolchains from: http://www.linaro.org/downloads/ - (c) kernel.org compilers (CROSS_COMPILE=arm-unknown-linux-gnueabi-) - - You can download pre-built toolchains from: - - ftp://www.kernel.org/pub/tools/crosstool/files/bin/ - Compile the source ------------------ -PH1-sLD3 reference board: +sLD3 reference board: $ make uniphier_sld3_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- + $ make CROSS_COMPILE=arm-linux-gnueabihf- -PH1-LD4 reference board: +LD4 reference board: $ make uniphier_ld4_sld8_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- + $ make CROSS_COMPILE=arm-linux-gnueabihf- -PH1-sLD8 reference board: +sLD8 reference board: $ make uniphier_ld4_sld8_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-sld8-ref + $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-sld8-ref -PH1-Pro4 reference board: +Pro4 reference board: $ make uniphier_pro4_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- + $ make CROSS_COMPILE=arm-linux-gnueabihf- -PH1-Pro5 4KBOX Board: - $ make uniphier_pro5_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- +Pro4 Ace board: + $ make uniphier_pro4_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pro4-ace + +Pro4 Sanji board: + $ make uniphier_pro4_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pro4-sanji -ProXstream2 Gentil board: +Pro5 4KBOX Board: $ make uniphier_pxs2_ld6b_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-proxstream2-gentil + $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pro5-4kbox -ProXstream2 Vodka board: +PXs2 Gentil board: $ make uniphier_pxs2_ld6b_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- + $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pxs2-gentil -PH1-LD6b reference board: +PXs2 Vodka board: $ make uniphier_pxs2_ld6b_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld6b-ref + $ make CROSS_COMPILE=arm-linux-gnueabihf- + +LD6b reference board: + $ make uniphier_pxs2_ld6b_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-ld6b-ref + +LD11 reference board: + $ make uniphier_ld11_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +LD20 reference board: + $ make uniphier_ld20_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- -You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-" -to use your favorite compiler. +PXs3 reference board: + $ make uniphier_v8_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- DEVICE_TREE=uniphier-pxs3-ref + +You may wish to change the "CROSS_COMPILE=..." to use your favorite compiler. Burn U-Boot images to NAND -------------------------- -Write two files to the NAND device as follows: - - spl/u-boot-spl-dtb.bin at the offset address 0x00000000 - - u-boot-dtb.img at the offset address 0x00010000 +Write the following to the NAND device: + + - spl/u-boot-spl.bin at the offset address 0x00000000 + - u-boot.bin at the offset address 0x00020000 + +or + + - u-boot-with-spl.bin at the offset address 0x00000000 If a TFTP server is available, the images can be easily updated. -Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public -directory, and then run the following command at the U-Boot command line: +Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory, +and then run the following command at the U-Boot command line: => run nandupdate +Burn U-Boot images to eMMC +-------------------------- + +Write the following to the Boot partition 1 of the eMMC device: + + - spl/u-boot-spl.bin at the offset address 0x00000000 + - u-boot.bin at the offset address 0x00020000 + +or + + - u-boot-with-spl.bin at the offset address 0x00000000 + +If a TFTP server is available, the images can be easily updated. +Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory, +and then run the following command at the U-Boot command line: + + => run emmcupdate + + UniPhier specific commands -------------------------- @@ -87,14 +116,19 @@ UniPhier specific commands - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP) shows the DDR PHY parameters set by the PHY training + - ddrmphy (enabled by CONFIG_CMD_DDRMPHY_DUMP) + shows the DDR Multi PHY parameters set by the PHY training + Supported devices ----------------- - UART (on-chip) - NAND + - SD/eMMC - USB 2.0 (EHCI) - USB 3.0 (xHCI) + - GPIO - LAN (on-board SMSC9118) - I2C - EEPROM (connected to the on-board I2C bus) @@ -119,7 +153,7 @@ The recommended bit switch settings are as follows: SW8 OFF(1)/ON(0) Description ------------------------------------------ - bit 1 ----> CS1_SPLIT + bit 1 <---- CS1_SPLIT bit 2 <---- CASE9_ON bit 3 <---- CASE10_ON bit 4 Don't Care Reserve @@ -145,4 +179,4 @@ newer SoCs. Even if it is, EA[25] is not connected on most of the boards. -- Masahiro Yamada -Aug. 2015 +Jan. 2017