X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=doc%2FREADME.rockchip;h=ec10ebbc26078c606aba11a9c9b77cd53541e648;hb=216800acf1fbf9f498455bf3c92d4513d9a4c681;hp=9d5af3d53d0aebcb8b810fa60657a21a92433c34;hpb=1c4043e53236d94f217e98625ea201690e85f56d;p=oweals%2Fu-boot.git diff --git a/doc/README.rockchip b/doc/README.rockchip index 9d5af3d53d..ec10ebbc26 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -1,20 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ # # Copyright (C) 2015 Google. Inc # Written by Simon Glass -# -# SPDX-License-Identifier: GPL-2.0+ -# U-Boot on Rockchip ================== -There are several repositories available with versions of U-Boot that support -many Rockchip devices [1] [2]. - -The current mainline support is experimental only and is not useful for -anything. It should provide a base on which to build. - -So far only support for the RK3288 and RK3036 is provided. +A wide range of Rockchip SoCs are supported in mainline U-Boot Prerequisites @@ -36,23 +28,64 @@ You will need: Building ======== -At present nine RK3288 boards are supported: +At present 12 RK3288 boards are supported: - EVB RK3288 - use evb-rk3288 configuration - Fennec RK3288 - use fennec-rk3288 configuration - Firefly RK3288 - use firefly-rk3288 configuration - Hisense Chromebook - use chromebook_jerry configuration + - Asus C100P Chromebook - use chromebook_minnie configuration + - Asus Chromebit - use chromebook_mickey configuration - MiQi RK3288 - use miqi-rk3288 configuration - phyCORE-RK3288 RDK - use phycore-rk3288 configuration - PopMetal RK3288 - use popmetal-rk3288 configuration - Radxa Rock 2 - use rock2 configuration - Tinker RK3288 - use tinker-rk3288 configuration + - Vyasa RK3288 - use vyasa-rk3288 configuration -Two RK3036 board are supported: +Two RK3036 boards are supported: - EVB RK3036 - use evb-rk3036 configuration - Kylin - use kylin_rk3036 configuration +One RK3328 board is supported: + + - EVB RK3328 + +Size RK3399 boards are supported (aarch64): + + - EBV RK3399 - use evb_rk3399 configuration + - Firefly RK3399 - use the firefly_rk3399 configuration + - Puma - use puma_rk3399 configuration + - Ficus - use ficus-rk3399 configuration + - Rock960 (Vamrs) - use rock960-rk3399 configuration + - Bob - use chromebook_bob configuration + +Four RK3368 boards are supported: + + - Sheep - use sheep-rk3368 configuration + - Lion - use lion-rk3368 configuration + - Geekbox - use geekbox configuration + - EVB PX5 - use evb-px5 configuration + +One RK3128 board is supported: + + - EVB RK3128 - use evb-rk3128 configuration + +One RK3229 board is supported: + + - EVB RK3229 - use evb-rk3229 configuration + +Two RV1108 boards are supported: + + - EVB RV1108 - use evb-rv1108 configuration + - Elgin R1 - use elgin-rv1108 configuration + +One RV3188 baord is supported: + + - Raxda Rock - use rock configuration + + For example: CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all @@ -102,7 +135,7 @@ To write an image that boots from an SD card (assumed to be /dev/sdc): sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384 This puts the Rockchip header and SPL image first and then places the U-Boot -image at block 16384 (i.e. 4MB from the start of the SD card). This +image at block 16384 (i.e. 8MB from the start of the SD card). This corresponds with this setting in U-Boot: #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x4000 @@ -126,11 +159,11 @@ something like: => The rockchip bootrom can load and boot an initial spl, then continue to -load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom. -Therefore RK3288 has another loading sequence like RK3036. The option of -U-Boot is controlled with this setting in U-Boot: +load a second-stage bootloader (ie. U-Boot) as soon as the control is returned +to the bootrom. Both the RK3288 and the RK3036 use this special boot sequence. +The configuration option enabling this is: - #define CONFIG_SPL_ROCKCHIP_BACK_TO_BROM + CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y You can create the image via the following operations: @@ -166,7 +199,7 @@ To write an image that boots from an SD card (assumed to be /dev/mmcblk0): ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out && cat ./spl/u-boot-spl-dtb.bin >> out && sudo dd if=out of=/dev/mmcblk0 seek=64 && - sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=256 + sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384 Booting from an SD card on RK3188 ================================= @@ -176,17 +209,17 @@ described above, but the image creation needs a bit more care. The bootrom of rk3188 expects to find a small 1kb loader which returns control to the bootrom, after which it will load the real loader, which -can then be up to 29kb in size and does the regular ddr init. +can then be up to 29kb in size and does the regular ddr init. This is +handled by a single image (built as the SPL stage) that tests whether +it is handled for the first or second time via code executed from the +boot0-hook. Additionally the rk3188 requires everything the bootrom loads to be rc4-encrypted. Except for the very first stage the bootrom always reads and decodes 2kb pages, so files should be sized accordingly. # copy tpl, pad to 1020 bytes and append spl -cat tpl/u-boot-tpl.bin > tplspl.bin -truncate -s 1020 tplspl.bin -cat spl/u-boot-spl.bin >> tplspl.bin -tools/mkimage -n rk3188 -T rksd -d tplspl.bin out +tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out # truncate, encode and append u-boot.bin truncate -s %2048 u-boot.bin @@ -221,7 +254,8 @@ You should see something like: Booting from SPI ================ -To write an image that boots from SPI flash (e.g. for the Haier Chromebook): +To write an image that boots from SPI flash (e.g. for the Haier Chromebook or +Bob): ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \ -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \ @@ -230,7 +264,7 @@ To write an image that boots from SPI flash (e.g. for the Haier Chromebook): dd if=out.bin of=out.bin.pad bs=4M conv=sync This converts the SPL image to the required SPI format by adding the Rockchip -header and skipping every 2KB block. Then the U-Boot image is written at +header and skipping every second 2KB block. Then the U-Boot image is written at offset 128KB and the whole image is padded to 4MB which is the SPI flash size. The position of U-Boot is controlled with this setting in U-Boot: @@ -266,7 +300,6 @@ Immediate priorities are: - USB device - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum) - NAND flash -- Support for other Rockchip parts - Boot U-Boot proper over USB OTG (at present only SPL works)