X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=doc%2FREADME.generic_usb_ohci;h=65b0896c7fd29603a69e3e1f6c1b82997d205491;hb=42c8a112d2e90598f0933d085ab4e47b41ab2aba;hp=c343dfdf90af41c74b738e214703d03564361ae4;hpb=c4e2753436bf8ed42731c5b8b9ceb62cdb482f43;p=oweals%2Fu-boot.git diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci index c343dfdf90..65b0896c7f 100644 --- a/doc/README.generic_usb_ohci +++ b/doc/README.generic_usb_ohci @@ -1,7 +1,7 @@ Notes on the the generic USB-OHCI driver ======================================== -This driver (drivers/usb_ohci.[ch]) is the result of the merge of +This driver (drivers/usb/usb_ohci.[ch]) is the result of the merge of various existing OHCI drivers that were basically identical beside cpu/board dependant initalization. This initalization has been moved into cpu/board directories and are called via the hooks below. @@ -11,24 +11,24 @@ Configuration options CONFIG_USB_OHCI_NEW: enable the new OHCI driver - CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks: + CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks: - - extern int usb_board_init(void); + - extern int board_usb_init(void); - extern int usb_board_stop(void); - extern int usb_cpu_init_fail(void); - CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks: + CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks: - extern int usb_cpu_init(void); - extern int usb_cpu_stop(void); - extern int usb_cpu_init_fail(void); - CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI + CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI registers - CFG_USB_OHCI_SLOT_NAME: slot name + CONFIG_SYS_USB_OHCI_SLOT_NAME: slot name - CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the + CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the root hub. @@ -36,12 +36,12 @@ Endianness issues ------------------ The USB bus operates in little endian, but unfortunately there are -OHCI controllers that operate in big endian such as ppc4xx and -mpc5xxx. For these the config option +OHCI controllers that operate in big endian such as ppc4xx. For these the +config option - CFG_OHCI_BE_CONTROLLER + CONFIG_SYS_OHCI_BE_CONTROLLER -needs to be defined. +needs to be defined. PCI Controllers @@ -51,10 +51,13 @@ You'll need to define CONFIG_PCI_OHCI -PCI Controllers need to do byte swapping on register accesses, so they -should to define: +If you have several USB PCI controllers, define - CFG_OHCI_SWAP_REG_ACCESS + CONFIG_PCI_OHCI_DEVNO: number of the OHCI device in PCI list +If undefined, the first instance found in PCI space will be used. +PCI Controllers need to do byte swapping on register accesses, so they +should to define: + CONFIG_SYS_OHCI_SWAP_REG_ACCESS