X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=doc%2FI2C_Edge_Conditions;h=f4a996870110d32aa815fdc913ceda8e5d20d901;hb=02c8d8cc6e52b29deabab179e365281131316cf1;hp=91557a3ca9786e9f048f952debd27c0985bc0c27;hpb=6fcc18e0a92788073c9c869ed2ff86a2f44bdce9;p=oweals%2Fu-boot.git diff --git a/doc/I2C_Edge_Conditions b/doc/I2C_Edge_Conditions index 91557a3ca9..f4a9968701 100644 --- a/doc/I2C_Edge_Conditions +++ b/doc/I2C_Edge_Conditions @@ -28,11 +28,16 @@ I2C Edge Conditions: Notes ----- -!!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A IBM 4xx BUG!!! +!!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A AMCC 4xx BUG!!! This reset edge condition could possibly be present in every I2C -controller and device available. We should probably have a bus reset -function for all our target CPUs. +controller and device available. For boards where a I2C bus reset +function can be implemented a i2c_init_board() function should be +provided and enabled by #define'ing CONFIG_SYS_I2C_INIT_BOARD in your +board's config file. Note that this is NOT necessary when using the +bit-banging I2C driver (common/soft_i2c.c) as this already includes +the I2C bus reset sequence. + Many thanks to Bill Hunter for finding this serious BUG. email to: