X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=crypto%2Fmodes%2Fgcm128.c;h=e638e42be857fdc8bf82bc1ac34012b65cffad3b;hb=3c075bf07f2d57c0272260409bf38fb6f438b016;hp=8b9070a45b76aac0d88bd011350d26ad1ccdbe0b;hpb=3f0d14055b45cccf41ce2b719f71847defc64c7c;p=oweals%2Fopenssl.git

diff --git a/crypto/modes/gcm128.c b/crypto/modes/gcm128.c
index 8b9070a45b..e638e42be8 100644
--- a/crypto/modes/gcm128.c
+++ b/crypto/modes/gcm128.c
@@ -148,6 +148,7 @@ static void gcm_gmult_8bit(u64 Xi[2], const u128 Htable[256])
 	const u8 *xi = (const u8 *)Xi+15;
 	size_t rem, n = *xi;
 	const union { long one; char little; } is_endian = {1};
+	__fips_constseg
 	static const size_t rem_8bit[256] = {
 		PACK(0x0000), PACK(0x01C2), PACK(0x0384), PACK(0x0246),
 		PACK(0x0708), PACK(0x06CA), PACK(0x048C), PACK(0x054E),
@@ -326,6 +327,7 @@ static void gcm_init_4bit(u128 Htable[16], u64 H[2])
 }
 
 #ifndef GHASH_ASM
+__fips_constseg
 static const size_t rem_4bit[16] = {
 	PACK(0x0000), PACK(0x1C20), PACK(0x3840), PACK(0x2460),
 	PACK(0x7080), PACK(0x6CA0), PACK(0x48C0), PACK(0x54E0),
@@ -461,6 +463,7 @@ static void gcm_ghash_4bit(u64 Xi[2],const u128 Htable[16],
      */ 
     u128 Hshr4[16];	/* Htable shifted right by 4 bits */
     u8   Hshl4[16];	/* Htable shifted left  by 4 bits */
+    __fips_constseg
     static const unsigned short rem_8bit[256] = {
 	0x0000, 0x01C2, 0x0384, 0x0246, 0x0708, 0x06CA, 0x048C, 0x054E,
 	0x0E10, 0x0FD2, 0x0D94, 0x0C56, 0x0918, 0x08DA, 0x0A9C, 0x0B5E,
@@ -668,8 +671,6 @@ void gcm_ghash_4bit_x86(u64 Xi[2],const u128 Htable[16],const u8 *inp,size_t len
 #  if __ARM_ARCH__>=7
 #   define GHASH_ASM_ARM
 #   define GCM_FUNCREF_4BIT
-extern unsigned int OPENSSL_armcap;
-
 void gcm_gmult_neon(u64 Xi[2],const u128 Htable[16]);
 void gcm_ghash_neon(u64 Xi[2],const u128 Htable[16],const u8 *inp,size_t len);
 #  endif
@@ -715,7 +716,8 @@ void CRYPTO_gcm128_init(GCM128_CONTEXT *ctx,void *key,block128_f block)
 #elif	TABLE_BITS==4
 # if	defined(GHASH_ASM_X86_OR_64)
 #  if	!defined(GHASH_ASM_X86) || defined(OPENSSL_IA32_SSE2)
-	if (OPENSSL_ia32cap_P[1]&(1<<1)) {	/* check PCLMULQDQ bit */
+	if (OPENSSL_ia32cap_P[0]&(1<<24) &&	/* check FXSR bit */
+	    OPENSSL_ia32cap_P[1]&(1<<1) ) {	/* check PCLMULQDQ bit */
 		gcm_init_clmul(ctx->Htable,ctx->H.u);
 		ctx->gmult = gcm_gmult_clmul;
 		ctx->ghash = gcm_ghash_clmul;
@@ -736,7 +738,7 @@ void CRYPTO_gcm128_init(GCM128_CONTEXT *ctx,void *key,block128_f block)
 	ctx->ghash = gcm_ghash_4bit;
 #  endif
 # elif	defined(GHASH_ASM_ARM)
-	if (OPENSSL_armcap & 1) {
+	if (OPENSSL_armcap_P & ARMV7_NEON) {
 		ctx->gmult = gcm_gmult_neon;
 		ctx->ghash = gcm_ghash_neon;
 	} else {